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x1000: Enable support for INIT_ATTR
Enable INIT_ATTR support in config.h. Load init code to the codec buffer, following the convention used by other targets that support INIT_ATTR. Change-Id: I8935fbaa100f0013bb328d71c4a49ec2ffafd003
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commit
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4 changed files with 33 additions and 1 deletions
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@ -1070,7 +1070,7 @@ Lyre prototype 1 */
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#if (defined(CPU_PP) || (CONFIG_CPU == AS3525) || (CONFIG_CPU == AS3525v2) || \
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#if (defined(CPU_PP) || (CONFIG_CPU == AS3525) || (CONFIG_CPU == AS3525v2) || \
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(CONFIG_CPU == IMX31L) || (CONFIG_CPU == IMX233) || \
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(CONFIG_CPU == IMX31L) || (CONFIG_CPU == IMX233) || \
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(CONFIG_CPU == RK27XX) || defined(CPU_COLDFIRE)) \
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(CONFIG_CPU == RK27XX) || (CONFIG_CPU == X1000) || defined(CPU_COLDFIRE)) \
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&& (CONFIG_PLATFORM & PLATFORM_NATIVE) && !defined(BOOTLOADER)
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&& (CONFIG_PLATFORM & PLATFORM_NATIVE) && !defined(BOOTLOADER)
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/* Functions that have INIT_ATTR attached are NOT guaranteed to survive after
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/* Functions that have INIT_ATTR attached are NOT guaranteed to survive after
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* root_menu() has been called. Their code may be overwritten by other data or
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* root_menu() has been called. Their code may be overwritten by other data or
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@ -13,6 +13,10 @@ INPUT(target/mips/system-mips.o)
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# undef CODEC_SIZE
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# undef CODEC_SIZE
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# define PLUGIN_BUFFER_SIZE 0
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# define PLUGIN_BUFFER_SIZE 0
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# define CODEC_SIZE 0
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# define CODEC_SIZE 0
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# if defined(HAVE_INIT_ATTR)
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/* This needs to be fixed for the bootloader */
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# error "bootloader does not support INIT_ATTR"
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# endif
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#endif
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#endif
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/* End of the audio buffer, where the codec buffer starts */
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/* End of the audio buffer, where the codec buffer starts */
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@ -21,11 +25,16 @@ INPUT(target/mips/system-mips.o)
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/* Where the codec buffer ends, and the plugin buffer starts */
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/* Where the codec buffer ends, and the plugin buffer starts */
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#define ENDCODECADDR (ENDAUDIOADDR + CODEC_SIZE)
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#define ENDCODECADDR (ENDAUDIOADDR + CODEC_SIZE)
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/* Place init code in the codec buffer */
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#define INIT_BASE ENDAUDIOADDR
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#define INIT_SIZE CODEC_SIZE
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MEMORY
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MEMORY
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{
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{
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IRAM : ORIGIN = X1000_IRAM_BASE, LENGTH = X1000_IRAM_SIZE
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IRAM : ORIGIN = X1000_IRAM_BASE, LENGTH = X1000_IRAM_SIZE
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DRAM : ORIGIN = X1000_DRAM_BASE, LENGTH = X1000_DRAM_SIZE
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DRAM : ORIGIN = X1000_DRAM_BASE, LENGTH = X1000_DRAM_SIZE
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TCSM : ORIGIN = X1000_TCSM_BASE, LENGTH = X1000_TCSM_SIZE
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TCSM : ORIGIN = X1000_TCSM_BASE, LENGTH = X1000_TCSM_SIZE
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INIT : ORIGIN = INIT_BASE, LENGTH = INIT_SIZE
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}
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}
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SECTIONS
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SECTIONS
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@ -40,6 +49,9 @@ SECTIONS
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.text :
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.text :
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{
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{
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*(.text*);
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*(.text*);
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#ifndef HAVE_INIT_ATTR
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*(.init*);
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#endif
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} > DRAM
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} > DRAM
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. = ALIGN(4);
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. = ALIGN(4);
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@ -89,6 +101,16 @@ SECTIONS
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} > TCSM AT> DRAM
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} > TCSM AT> DRAM
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_tcsmcopy = LOADADDR(.tcsm);
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_tcsmcopy = LOADADDR(.tcsm);
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#ifdef HAVE_INIT_ATTR
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.init :
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{
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_initstart = .;
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*(.init*);
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_initend = .;
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} > INIT AT> DRAM
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_initcopy = LOADADDR(.init);
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#endif
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/* Sections below have no data. */
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/* Sections below have no data. */
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. = ALIGN(4);
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. = ALIGN(4);
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@ -75,6 +75,15 @@ _realstart:
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bal _copy
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bal _copy
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nop
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nop
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#ifdef HAVE_INIT_ATTR
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/* Copy init code */
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la a0, _initcopy
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la a1, _initstart
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la a2, _initend
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bal _copy
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nop
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#endif
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/* Clear the BSS segment (needed to zero-initialize C static values) */
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/* Clear the BSS segment (needed to zero-initialize C static values) */
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la a0, _bssbegin
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la a0, _bssbegin
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la a1, _bssend
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la a1, _bssend
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@ -18,6 +18,7 @@ SECTIONS
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*(.startup.spl);
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*(.startup.spl);
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*(.text*);
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*(.text*);
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*(.icode*);
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*(.icode*);
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*(.init*);
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} > TCSM
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} > TCSM
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. = ALIGN(4);
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. = ALIGN(4);
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