Fix a few possible problems discovered in -O0 / eabi experiments.

- two essential parts of Sansa AMS drivers are optimzed away in newer gcc, so mark them volatile.
- use "r" instead of "i" (which is apparently invalid syntax) for the input list in some inline assembly

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23634 a1c6a512-1295-4272-9138-f99709370657

firmware/target/arm/as3525/ata_sd_as3525.c

@@ -129,7 +129,13 @@ static volatile unsigned int transfer_error[NUM_VOLUMES];
 static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SECTOR_SIZE] __attribute__((aligned(32)));   /* align on cache line size */
 static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
 
-static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
+static inline void mci_delay(void)
+{
+    int i = 0xffff;
+    do {
+        asm volatile("nop\n");
+    } while (--i);
+}
 
 #ifdef HAVE_HOTSWAP
 static int sd1_oneshot_callback(struct timeout *tmo)

firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c

@@ -46,7 +46,7 @@ static int xoffset = 20; /* needed for flip */
 /* we need to write a red pixel for correct button reads
  * (see lcd_button_support()),but that must not happen while the lcd is updating
  * so block lcd_button_support the during updates */
-static bool lcd_busy = false;
+static volatile int lcd_busy = false;
 
 static inline void lcd_delay(int x)
 {

firmware/target/arm/system-arm.h

@@ -243,7 +243,7 @@ static inline void enable_interrupt(int mask)
         "mrs     %0, cpsr   \n"
         "bic     %0, %0, %1 \n"
         "msr     cpsr_c, %0 \n"
-        : "=&r"(tmp) : "i"(mask));
+        : "=&r"(tmp) : "r"(mask));
 }
 
 static inline void disable_interrupt(int mask)
@@ -254,7 +254,7 @@ static inline void disable_interrupt(int mask)
         "mrs     %0, cpsr   \n"
         "orr     %0, %0, %1 \n"
         "msr     cpsr_c, %0 \n"
-        : "=&r"(tmp) : "i"(mask));
+        : "=&r"(tmp) : "r"(mask));
 }
 
 static inline int disable_interrupt_save(int mask)
@@ -266,7 +266,7 @@ static inline int disable_interrupt_save(int mask)
         "orr     %0, %1, %2 \n"
         "msr     cpsr_c, %0 \n"
         : "=&r"(tmp), "=&r"(cpsr)
-        : "i"(mask));
+        : "r"(mask));
     return cpsr;
 }