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mmu-arm (v4/v5) : use one less instruction in invalidate_dcache/clean_dcache

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25625 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2010-04-13 14:12:54 +00:00
parent 88148f39f6
commit a0e1e329f7
1 changed files with 11 additions and 13 deletions
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24
firmware/target/arm/mmu-arm.S
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@ -275,10 +275,10 @@ clean_dcache_range:
clean_dcache: clean_dcache:
cpucache_flush: cpucache_flush:
@ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ
mov r0, #0x00000000 @ mov r1, #0x00000000 @
1: @ clean_start @ 1: @ clean_start @
mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index
add r0, r0, #0x00000020 @ add r0, r1, #0x00000020 @
mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index
add r0, r0, #0x00000020 @ add r0, r0, #0x00000020 @
mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index
@ -292,10 +292,9 @@ cpucache_flush:
mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index
add r0, r0, #0x00000020 @ add r0, r0, #0x00000020 @
mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index
sub r0, r0, #0x000000e0 @ adds r1, r1, #0x04000000 @ will wrap to zero at loop end
adds r0, r0, #0x04000000 @ will wrap to zero at loop end
bne 1b @ clean_start @ bne 1b @ clean_start @
mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer mcr p15, 0, r1, c7, c10, 4 @ Drain write buffer
bx lr @ bx lr @
.size clean_dcache, .-clean_dcache .size clean_dcache, .-clean_dcache
@ -310,10 +309,10 @@ cpucache_flush:
.type invalidate_dcache, %function .type invalidate_dcache, %function
invalidate_dcache: invalidate_dcache:
@ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ
mov r0, #0x00000000 @ mov r1, #0x00000000 @
1: @ inv_start @ 1: @ inv_start @
mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index
add r0, r0, #0x00000020 @ add r0, r1, #0x00000020 @
mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index
add r0, r0, #0x00000020 @ add r0, r0, #0x00000020 @
mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index
@ -327,10 +326,9 @@ invalidate_dcache:
mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index
add r0, r0, #0x00000020 @ add r0, r0, #0x00000020 @
mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index
sub r0, r0, #0x000000e0 @ adds r1, r1, #0x04000000 @ will wrap to zero at loop end
adds r0, r0, #0x04000000 @ will wrap to zero at loop end
bne 1b @ inv_start @ bne 1b @ inv_start @
mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer mcr p15, 0, r1, c7, c10, 4 @ Drain write buffer
bx lr @ bx lr @
.size invalidate_dcache, .-invalidate_dcache .size invalidate_dcache, .-invalidate_dcache
@ -346,8 +344,8 @@ invalidate_dcache:
.global cpucache_invalidate @ Alias .global cpucache_invalidate @ Alias
invalidate_idcache: invalidate_idcache:
cpucache_invalidate: cpucache_invalidate:
mov r1, lr @ save lr to r1, call uses r0 only mov r2, lr @ save lr to r1, call uses r0 only
bl invalidate_dcache @ Clean and invalidate entire DCache bl invalidate_dcache @ Clean and invalidate entire DCache
mcr p15, 0, r0, c7, c5, 0 @ Invalidate ICache (r0=0 from call) mcr p15, 0, r1, c7, c5, 0 @ Invalidate ICache (r1=0 from call)
mov pc, r1 @ mov pc, r2 @
.size invalidate_idcache, .-invalidate_idcache .size invalidate_idcache, .-invalidate_idcache