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S5L8700: initial framework for PCM (using DMA transfers)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21656 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Bertrik Sikken
parent
eec5842e28
commit
9b1c774218
3 changed files with 436 additions and 0 deletions
119
firmware/target/arm/s5l8700/dma-s5l8700.c
Executable file
119
firmware/target/arm/s5l8700/dma-s5l8700.c
Executable file
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2009 Bertrik Sikken
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "s5l8700.h"
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#include "dma-target.h"
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#include "panic.h"
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#include "system.h"
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/* Driver for the IODMA part of the s5l8700
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When requesting a DMA transfer the supplied callback is stored and called
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upon completion of the DMA transfer (callback runs in interrupt context).
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*/
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#define DMAC_BASE 0x38400000
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#define DMABASE(c) (*(volatile unsigned int*)(DMAC_BASE+0x00+(0x20*c)))
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#define DMACON(c) (*(volatile unsigned int*)(DMAC_BASE+0x04+(0x20*c)))
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#define DMATCNT(c) (*(volatile unsigned int*)(DMAC_BASE+0x08+(0x20*c)))
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#define DMACADDR(c) (*(volatile unsigned int*)(DMAC_BASE+0x0C+(0x20*c)))
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#define DMACTCNT(c) (*(volatile unsigned int*)(DMAC_BASE+0x10+(0x20*c)))
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#define DMACOM(c) (*(volatile unsigned int*)(DMAC_BASE+0x14+(0x20*c)))
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#define DMANOFF(c) (*(volatile unsigned int*)(DMAC_BASE+0x18+(0x20*c)))
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#define DMACOM_HOLD 2 /* only allowed on channel 0 */
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#define DMACOM_SKIP 3 /* only allowed on channel 0 */
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#define DMACOM_CHAN_ON 4
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#define DMACOM_CHAN_OFF 5
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#define DMACOM_CLEAR_HCOM 6
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#define DMACOM_CLEAR_HCOM_WCOM 7
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/* one completion callback for each channel */
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static void (*dma_callback[4])(void);
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void dma_init(void)
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{
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int i;
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for (i = 0; i < 4; i++) {
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dma_callback[i] = NULL;
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dma_disable_channel(i);
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}
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INTMSK |= (1 << 10);
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}
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/* setup a DMA transfer, but do not start it yet */
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void dma_setup_channel(int channel, int sel, int dir, int dsize, int blen,
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void *addr, size_t size, void (*callback)(void))
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{
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dma_callback[channel] = callback;
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DMACON(channel) = (sel << 30) | /* DEVSEL */
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(dir << 29) | /* DIR */
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(0 << 24) | /* SCHCNT */
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(dsize << 22) | /* DSIZE */
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(blen << 19) | /* BLEN */
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(0 << 18) | /* RELOAD */
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(0 << 17) | /* HCOMINT */
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(1 << 16) | /* WCOMINT */
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(0 << 0); /* OFFSET */
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DMABASE(channel) = (unsigned int)addr;
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DMATCNT(channel) = size;
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}
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void dma_enable_channel(int channel)
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{
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DMACOM(channel) = DMACOM_CHAN_ON;
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}
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void dma_disable_channel(int channel)
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{
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DMACOM(channel) = DMACOM_CHAN_OFF;
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}
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/* interrupt handler for all DMA channels */
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void INT_DMA(void)
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{
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unsigned int mask;
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int channel;
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mask = (1 << 0) | /* WCOMx interrupt bit */
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(1 << 1); /* HCOMx interrupt bit */
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for (channel = 0; channel < 4; channel++) {
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if (DMAALLST & mask) {
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/* clear half and whole completion bits */
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DMACOM(channel) = DMACOM_CLEAR_HCOM_WCOM;
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if (dma_callback[channel]) {
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dma_callback[channel]();
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}
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}
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mask <<= 4;
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}
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}
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41
firmware/target/arm/s5l8700/dma-target.h
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41
firmware/target/arm/s5l8700/dma-target.h
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@ -0,0 +1,41 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2009 Bertrik Sikken
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdlib.h>
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/* generic DMA definitions */
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#define DMA_IO_TO_MEM 0
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#define DMA_MEM_TO_IO 1
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/* IISOUT DMA settings */
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#define DMA_IISOUT_CHANNEL 0
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#define DMA_IISOUT_SELECT 0
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#define DMA_IISOUT_DSIZE 1 /* 1 = 16-bit/transfer */
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#define DMA_IISOUT_BLEN 0 /* 0 = 1 transfer/burst */
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void dma_init(void);
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void dma_setup_channel(int channel, int sel, int dir, int dsize, int blen,
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void *addr, size_t size, void (*callback)(void));
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void dma_enable_channel(int channel);
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void dma_disable_channel(int channel);
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276
firmware/target/arm/s5l8700/pcm-s5l8700.c
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276
firmware/target/arm/s5l8700/pcm-s5l8700.c
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@ -0,0 +1,276 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2009 Bertrik Sikken
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <string.h>
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#include "config.h"
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#include "system.h"
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#include "audio.h"
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#include "s5l8700.h"
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#include "panic.h"
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#include "audiohw.h"
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#include "pcm.h"
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#include "pcm_sampr.h"
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#include "dma-target.h"
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/* Driver for the IIS/PCM part of the s5l8700 using DMA
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Notes:
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- not all possible PCM sample rates are enabled (no support in codec driver)
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- pcm_play_dma_pause is untested, not sure if implemented the right way
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- pcm_play_dma_stop is untested, not sure if implemented the right way
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- pcm_play_dma_get_peak_buffer is not implemented
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- recording is not implemented
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*/
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static void dma_callback(void);
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static volatile int locked = 0;
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/* table of recommended PLL/MCLK dividers for mode 256Fs from the datasheet */
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static const struct div_entry {
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int pdiv, mdiv, sdiv, cdiv;
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} div_table[HW_NUM_FREQ] = {
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[HW_FREQ_11] = { 26, 189, 3, 8},
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[HW_FREQ_22] = { 50, 98, 2, 8},
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[HW_FREQ_44] = { 37, 151, 1, 9},
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[HW_FREQ_88] = { 50, 98, 1, 4},
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#if 0 /* disabled because the codec driver does not support it (yet) */
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[HW_FREQ_8 ] = { 28, 192, 3, 12}
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[HW_FREQ_16] = { 28, 192, 3, 6},
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[HW_FREQ_32] = { 28, 192, 2, 6},
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[HW_FREQ_12] = { 28, 192, 3, 8},
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[HW_FREQ_24] = { 28, 192, 2, 8},
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[HW_FREQ_48] = { 28, 192, 2, 4},
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[HW_FREQ_96] = { 28, 192, 1, 4},
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#endif
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};
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/* Mask the DMA interrupt */
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void pcm_play_lock(void)
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{
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if (locked++ == 0) {
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INTMSK &= ~(1 << 10);
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}
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}
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/* Unmask the DMA interrupt if enabled */
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void pcm_play_unlock(void)
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{
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if (--locked == 0) {
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INTMSK |= ~(1 << 10);
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}
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}
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static void play_next(void *addr, size_t size)
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{
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/* setup DMA */
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dma_setup_channel(DMA_IISOUT_CHANNEL, DMA_IISOUT_SELECT, DMA_MEM_TO_IO,
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DMA_IISOUT_DSIZE, DMA_IISOUT_BLEN, addr, size / 2,
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dma_callback);
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/* DMA channel on */
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dma_enable_channel(DMA_IISOUT_CHANNEL);
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}
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static void dma_callback(void)
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{
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unsigned char *dma_start_addr;
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size_t dma_size;
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register pcm_more_callback_type get_more = pcm_callback_for_more;
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if (get_more) {
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get_more(&dma_start_addr, &dma_size);
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if (dma_size == 0) {
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pcm_play_dma_stop();
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pcm_play_dma_stopped_callback();
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}
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else {
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play_next(dma_start_addr, dma_size);
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}
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}
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}
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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/* S1: DMA channel 0 set */
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dma_setup_channel(DMA_IISOUT_CHANNEL, DMA_IISOUT_SELECT, DMA_MEM_TO_IO,
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DMA_IISOUT_DSIZE, DMA_IISOUT_BLEN, (void *)addr, size / 2,
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dma_callback);
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/* S2: IIS Tx mode set */
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I2STXCON = (DMA_IISOUT_BLEN << 16) | /* burst length */
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(0 << 15) | /* 0 = falling edge */
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(0 << 13) | /* 0 = basic I2S format */
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(0 << 12) | /* 0 = MSB first */
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(0 << 11) | /* 0 = left channel for low polarity */
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(3 << 8) | /* MCLK divider */
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(0 << 5) | /* 0 = 16-bit */
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(0 << 3) | /* bit clock per frame */
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(1 << 0); /* channel index */
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/* S3: DMA channel 0 on */
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dma_enable_channel(DMA_IISOUT_CHANNEL);
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/* S4: IIS Tx clock on */
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I2SCLKCON = (1 << 0); /* 1 = power on */
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/* S5: IIS Tx on */
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I2STXCOM = (1 << 3) | /* 1 = transmit mode on */
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(1 << 2) | /* 1 = I2S interface enable */
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(1 << 1) | /* 1 = DMA request enable */
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(0 << 0); /* 0 = LRCK on */
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}
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void pcm_play_dma_stop(void)
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{
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/* DMA channel off */
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dma_disable_channel(DMA_IISOUT_CHANNEL);
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/* TODO Some time wait */
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/* LRCK half cycle wait */
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/* IIS Tx off */
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I2STXCOM = (1 << 3) | /* 1 = transmit mode on */
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(0 << 2) | /* 1 = I2S interface enable */
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(1 << 1) | /* 1 = DMA request enable */
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(0 << 0); /* 0 = LRCK on */
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}
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/* pause playback by disabling further DMA requests */
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void pcm_play_dma_pause(bool pause)
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{
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if (pause) {
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I2STXCOM &= ~(1 << 1); /* DMA request enable */
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}
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else {
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I2STXCOM |= (1 << 1); /* DMA request enable */
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}
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}
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void pcm_play_dma_init(void)
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{
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/* configure IIS pins */
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PCON7 = (PCON7 & ~(0x0FFFFF00)) | 0x02222200;
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/* enable clock to the IIS module */
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PWRCON &= ~(1 << 6);
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audiohw_preinit();
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}
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void pcm_postinit(void)
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{
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audiohw_postinit();
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}
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/* set the configured PCM frequency */
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void pcm_dma_apply_settings(void)
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{
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audiohw_set_frequency(pcm_sampr);
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struct div_entry div = div_table[pcm_fsel];
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/* configure PLL1 and MCLK for the desired sample rate */
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PLL1PMS = (div.pdiv << 16) |
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(div.mdiv << 8) |
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(div.sdiv << 0);
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PLL1LCNT = 7500; /* no idea what to put here */
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/* enable PLL1 and wait for lock */
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PLLCON |= (1 << 1);
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while ((PLLLOCK & (1 << 1)) == 0);
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/* configure MCLK */
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CLKCON = (CLKCON & ~(0xFF)) |
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(0 << 7) | /* MCLK_MASK */
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(2 << 5) | /* MCLK_SEL = PLL1 */
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(1 << 4) | /* MCLK_DIV_ON */
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(div.cdiv - 1); /* MCLK_DIV_VAL */
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}
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size_t pcm_get_bytes_waiting(void)
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{
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return DMATCNT0 * 2;
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}
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const void * pcm_play_dma_get_peak_buffer(int *count)
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{
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/* currently not supported */
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*count = 0;
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return 0;
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}
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#ifdef HAVE_PCM_DMA_ADDRESS
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void * pcm_dma_addr(void *addr)
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{
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if (addr != NULL)
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addr = UNCACHED_ADDR(addr);
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return addr;
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}
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#endif
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/****************************************************************************
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** Recording DMA transfer
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**/
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#ifdef HAVE_RECORDING
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void pcm_rec_lock(void)
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{
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}
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void pcm_rec_unlock(void)
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{
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}
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void pcm_record_more(void *start, size_t size)
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{
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(void)start;
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(void)size;
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}
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void pcm_rec_dma_stop(void)
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{
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}
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void pcm_rec_dma_start(void *addr, size_t size)
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{
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(void)addr;
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(void)size;
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}
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void pcm_rec_dma_close(void)
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{
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}
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void pcm_rec_dma_init(void)
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{
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}
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const void * pcm_rec_dma_get_peak_buffer(int *count)
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{
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(void)count;
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}
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#endif /* HAVE_RECORDING */
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