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firmware: cleanup PortalPlayer NOCACHE_BASE defines
Move the definition of NOCACHE_BASE to the CPU headers instead of having them copy-and-pasted in a few places. Change-Id: Ibbab27a5a07906d46dbd4dd9065f2238bc885d6b
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408f155f53
commit
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6 changed files with 26 additions and 23 deletions
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@ -15,14 +15,6 @@ OUTPUT_FORMAT(elf32-littlemips)
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#error Unknown CPU architecture
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#endif
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#if defined(CPU_PP)
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#ifdef CPU_PP502x
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#define NOCACHE_BASE 0x10000000
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#else
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#define NOCACHE_BASE 0x28000000
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#endif /* CPU_* */
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#endif /* CPU_PP */
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#if CONFIG_CPU==IMX31L
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#define DRAMSIZE ((MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE \
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- CODEC_SIZE - QHARRAY_SIZE - FRAME_SIZE - TTB_SIZE)
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@ -194,11 +186,6 @@ OUTPUT_FORMAT(elf32-littlemips)
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# error "DRAMORIG not defined!"
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#endif
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#ifndef NOCACHE_BASE
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/* Default to no offset if target doesn't define this */
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#define NOCACHE_BASE 0x00000000
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#endif
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#define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
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@ -268,7 +255,7 @@ SECTIONS
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#endif
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} > PLUGIN_RAM
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#if NOCACHE_BASE != 0
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#if defined(NOCACHE_BASE)
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/*
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* Allocate .ncdata based on the following constraints:
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*
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@ -304,7 +291,7 @@ SECTIONS
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. = ALIGN(0x4);
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} > PLUGIN_RAM
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#if NOCACHE_BASE != 0
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#if defined(NOCACHE_BASE)
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/*
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* .ncbss has the same constraints as the .ncdata section
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* above but there is an extra complication: because it is
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@ -385,7 +372,7 @@ SECTIONS
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}
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}
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#if NOCACHE_BASE != 0
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#if defined(NOCACHE_BASE)
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/* Some asserts to make sure nocache sections appear correctly defined */
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ASSERT(LOADADDR(.ncdata) == ADDR(.ncdata) - NOCACHE_BASE, ".ncdata has incorrect LMA/VMA address");
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ASSERT(LOADADDR(.ncdata) % CACHEALIGN_SIZE == 0, ".ncdata incorrectly aligned");
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