From 96b6a7b4e47e70c5eb3086620a7ba9e7fb81493d Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Thu, 14 Nov 2024 16:17:30 +0000 Subject: [PATCH] arm: implement get_sp for Cortex-M On Cortex-M we can just return SP directly, which will return PSP/MSP depending on the current processor mode. Note that unwarminder doesn't handle Cortex-M exception frames yet, so a panic from an interrupt handler will currently stop at the exception boundary. Change-Id: I8818126c065c896d781bd52b877965a4094dee2a --- lib/unwarminder/SOURCES | 4 +++- lib/unwarminder/get_sp.S | 10 +++++++--- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/lib/unwarminder/SOURCES b/lib/unwarminder/SOURCES index 87c7d69010..3ce4256ffa 100644 --- a/lib/unwarminder/SOURCES +++ b/lib/unwarminder/SOURCES @@ -1,8 +1,10 @@ backtrace-unwarminder.c -get_sp.S unwarm_arm.c unwarm.c unwarminder.c unwarmmem.c unwarm_thumb.c safe_read.S +#if defined(CPU_ARM_CLASSIC) +get_sp.S +#endif diff --git a/lib/unwarminder/get_sp.S b/lib/unwarminder/get_sp.S index 9449a5e946..cdff216ca0 100644 --- a/lib/unwarminder/get_sp.S +++ b/lib/unwarminder/get_sp.S @@ -6,14 +6,18 @@ * * On RaaA we are called in USER mode most probably and * cpsr mangling is restricted. We simply copy SP value - * in this situation + * in this situation. + * + * For Cortex-M, SP is banked to MSP/PSP based on the current + * processor mode. Exception stack frames can be detected and + * backtraced across, so we can just return SP like RaaA does. */ .section .text .type __get_sp,%function .global __get_sp __get_sp: -#if (CONFIG_PLATFORM & PLATFORM_NATIVE) +#if (CONFIG_PLATFORM & PLATFORM_NATIVE) && defined(CPU_ARM_CLASSIC) mrs r1, cpsr /* save current state */ orr r0, r1, #0xc0 msr cpsr_c, r0 /* disable IRQ and FIQ */ @@ -28,7 +32,7 @@ call_from_exception: get_sp: #endif mov r0, sp /* get SP */ -#if (CONFIG_PLATFORM & PLATFORM_NATIVE) +#if (CONFIG_PLATFORM & PLATFORM_NATIVE) && defined(CPU_ARM_CLASSIC) msr cpsr_c, r1 /* restore mode */ #endif bx lr