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Clarify comments in ARMv6 divider regarding special-case handling of large (high bit set) numerators.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24783 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Andrew Mahone 2010-02-20 06:29:23 +00:00
parent 3716abba92
commit 950b2dfa2c
2 changed files with 9 additions and 5 deletions
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10
apps/codecs/demac/libdemac/udiv32_arm.S
View file

@ -234,10 +234,12 @@ udiv32_arm:
mul \inv, \divisor, \neg mul \inv, \divisor, \neg
smlawt \divisor, \divisor, \inv, \divisor smlawt \divisor, \divisor, \inv, \divisor
mul \inv, \divisor, \neg mul \inv, \divisor, \neg
/* This will save a cycle on ARMv6, but does not produce a correct result /* This will save a cycle on ARMv6, but requires that the numerator sign
if numerator sign bit is set. This case accounts for about 1 in 10^7 of bit is not set (that of inv is guaranteed unset). The branch should
divisions, done by the APE decoder, so we specialize for the more common predict very well, making it typically 1 cycle, and thus both the branch
case and handle the uncommon large-numerator separately */ and test fill delay cycles for the multiplies. Based on logging of
numerator sizes in the APE codec, the branch is taken about 1/10^7 of
the time. */
#if ARM_ARCH >= 6 #if ARM_ARCH >= 6
tst \numerator, \numerator tst \numerator, \numerator
smmla \divisor, \divisor, \inv, \divisor smmla \divisor, \divisor, \inv, \divisor

4
firmware/target/arm/support-arm.S
View file

@ -244,7 +244,9 @@
tst \numerator, \numerator tst \numerator, \numerator
smmla \divisor, \divisor, \inv, \divisor smmla \divisor, \divisor, \inv, \divisor
/* Branch to large-numerator handler, or else use smmul if sign bit is not /* Branch to large-numerator handler, or else use smmul if sign bit is not
set. */ set. This wins on average with random numerators, and should be no
slower than using umull for small numerator, even if prediction fails.
*/
bmi 40f bmi 40f
smmul \inv, \numerator, \divisor smmul \inv, \numerator, \divisor
#else #else