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imx233: Make bootloader compile, fix up remanining warnings

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Change-Id: Ie87d178c56455b93364dffa656ebbee9cd7a4bad
This commit is contained in:
Solomon Peachy 2025-01-08 09:13:52 -05:00
parent 18aa0f6278
commit 9417ece0ea
4 changed files with 8 additions and 9 deletions
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6
firmware/export/config/creativezenv.h
View file

@ -25,8 +25,6 @@
explicitly if different */ explicitly if different */
#define INPUT_SRC_CAPS SRC_CAP_MIC #define INPUT_SRC_CAPS SRC_CAP_MIC
/* define this if you have a colour LCD */ /* define this if you have a colour LCD */
#define HAVE_LCD_COLOR #define HAVE_LCD_COLOR
@ -161,7 +159,7 @@
#define CURRENT_MAX_CHG 200 #define CURRENT_MAX_CHG 200
/* Define this to the CPU frequency */ /* Define this to the CPU frequency */
#define CPU_FREQ 454000000 #define CPU_FREQ 200000000
/* Type of LCD */ /* Type of LCD */
#define CONFIG_LCD LCD_CREATIVEZENV #define CONFIG_LCD LCD_CREATIVEZENV
@ -188,5 +186,3 @@
#define BOOTDIR "/.rockbox" #define BOOTDIR "/.rockbox"
#define INCLUDE_TIMEOUT_API #define INCLUDE_TIMEOUT_API

4
firmware/target/arm/imx233/emi-imx233.c
View file

@ -40,6 +40,7 @@ struct emi_reg_t
* Values from IMX233 manual, for Mobile DDR 7.5ns (133 MHz and 64MHz) * Values from IMX233 manual, for Mobile DDR 7.5ns (133 MHz and 64MHz)
* Make sure the last value is written to register 40. */ * Make sure the last value is written to register 40. */
#if IMX233_SUBTARGET >= 3700
static struct emi_reg_t settings_60M[15] ICONST_ATTR = static struct emi_reg_t settings_60M[15] ICONST_ATTR =
{ {
{4, 0x01000101}, /* DLL bypass mode, concurrent auto-precharge and bank split */ {4, 0x01000101}, /* DLL bypass mode, concurrent auto-precharge and bank split */
@ -82,7 +83,6 @@ static struct emi_reg_t settings_155M[15] ICONST_ATTR __attribute__((alias("sett
static void set_frequency(unsigned long freq) ICODE_ATTR; static void set_frequency(unsigned long freq) ICODE_ATTR;
#if IMX233_SUBTARGET >= 3700
static void set_frequency(unsigned long freq) static void set_frequency(unsigned long freq)
{ {
/** WARNING all restriction of imx233_emi_set_frequency apply here !! */ /** WARNING all restriction of imx233_emi_set_frequency apply here !! */
@ -217,4 +217,4 @@ struct imx233_emi_info_t imx233_emi_get_info(void)
info.size = 2 * (1 << (info.rows + info.columns)) * info.chips * info.banks; info.size = 2 * (1 << (info.rows + info.columns)) * info.chips * info.banks;
#endif #endif
return info; return info;
} }

4
firmware/target/arm/imx233/ssp-imx233.c
View file

@ -8,7 +8,7 @@
* $Id$ * $Id$
* *
* Copyright (C) 2011 by Amaury Pouly * Copyright (C) 2011 by Amaury Pouly
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License * modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2 * as published by the Free Software Foundation; either version 2
@ -262,9 +262,9 @@ void imx233_ssp_setup_ssp2_sd_mmc_pins(bool enable_pullups, unsigned bus_width)
{ {
(void) enable_pullups; (void) enable_pullups;
(void) bus_width; (void) bus_width;
#ifdef VPIN_SSP2_CMD
unsigned clk_drive = PINCTRL_DRIVE_8mA; unsigned clk_drive = PINCTRL_DRIVE_8mA;
unsigned dat_drive = PINCTRL_DRIVE_4mA; unsigned dat_drive = PINCTRL_DRIVE_4mA;
#ifdef VPIN_SSP2_CMD
/* SSP_{CMD,SCK} */ /* SSP_{CMD,SCK} */
imx233_pinctrl_setup_vpin(VPIN_SSP2_CMD, "ssp2_cmd", dat_drive, enable_pullups); imx233_pinctrl_setup_vpin(VPIN_SSP2_CMD, "ssp2_cmd", dat_drive, enable_pullups);
imx233_pinctrl_setup_vpin(VPIN_SSP2_SCK, "ssp2_sck", clk_drive, false); imx233_pinctrl_setup_vpin(VPIN_SSP2_SCK, "ssp2_sck", clk_drive, false);

3
firmware/target/arm/imx233/system-target.h
View file

@ -35,6 +35,7 @@
#define IMX233_CPUFREQ_454_MHz 454740000 #define IMX233_CPUFREQ_454_MHz 454740000
#define IMX233_CPUFREQ_320_MHz 320000000 #define IMX233_CPUFREQ_320_MHz 320000000
#define IMX233_CPUFREQ_261_MHz 261820000 #define IMX233_CPUFREQ_261_MHz 261820000
#define IMX233_CPUFREQ_200_MHz 200000000
#define IMX233_CPUFREQ_64_MHz 64000000 #define IMX233_CPUFREQ_64_MHz 64000000
#define IMX233_CPUFREQ_24_MHz 24000000 #define IMX233_CPUFREQ_24_MHz 24000000
@ -44,6 +45,8 @@
#define CPUFREQ_MAX IMX233_CPUFREQ_454_MHz #define CPUFREQ_MAX IMX233_CPUFREQ_454_MHz
#elif IMX233_SUBTARGET >= 3700 #elif IMX233_SUBTARGET >= 3700
#define CPUFREQ_MAX IMX233_CPUFREQ_320_MHz #define CPUFREQ_MAX IMX233_CPUFREQ_320_MHz
#else
#define CPUFREQ_MAX IMX233_CPUFREQ_200_MHz
#endif #endif
#define CPUFREQ_SLEEP IMX233_CPUFREQ_64_MHz #define CPUFREQ_SLEEP IMX233_CPUFREQ_64_MHz