mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-12-09 05:05:20 -05:00
Rework ATA driver to get rid of lots of target-specific constants and allow for non-memory-mapped task file registers.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28950 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann
parent
0ce42df073
commit
9339be1279
11 changed files with 117 additions and 331 deletions
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@ -19,6 +19,7 @@
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*
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****************************************************************************/
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#include <stdbool.h>
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#include <inttypes.h>
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#include "ata.h"
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#include "kernel.h"
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#include "thread.h"
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@ -34,7 +35,37 @@
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#include "ata-target.h"
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#include "storage.h"
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#define SECTOR_SIZE (512)
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#ifndef ATA_OUT8
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#define ATA_OUT8(reg, data) (reg) = (data)
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#endif
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#ifndef ATA_OUT16
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#define ATA_OUT16(reg, data) (reg) = (data)
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#endif
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#ifndef ATA_IN8
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#define ATA_IN8(reg) (reg)
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#endif
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#ifndef ATA_IN16
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#define ATA_IN16(reg) (reg)
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#endif
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#ifndef ATA_SWAP_IDENTIFY
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#define ATA_SWAP_IDENTIFY(word) (word)
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#endif
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#define SECTOR_SIZE 512
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#define STATUS_BSY 0x80
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#define STATUS_RDY 0x40
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#define STATUS_DRQ 0x08
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#define STATUS_ERR 0x01
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#define STATUS_DF 0x20
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#define ERROR_IDNF 0x10
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#define ERROR_ABRT 0x04
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#define TEST_PATTERN1 0xa5
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#define TEST_PATTERN2 0x5a
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#define TEST_PATTERN3 0xaa
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#define TEST_PATTERN4 0x55
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#define ATA_FEATURE ATA_ERROR
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@ -210,7 +241,7 @@ STATICIRAM ICODE_ATTR int wait_for_bsy(void)
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do
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{
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if (!(ATA_STATUS & STATUS_BSY))
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if (!(ATA_IN8(ATA_STATUS) & STATUS_BSY))
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return 1;
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last_disk_activity = current_tick;
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yield();
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@ -230,7 +261,7 @@ STATICIRAM ICODE_ATTR int wait_for_rdy(void)
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do
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{
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if (ATA_ALT_STATUS & STATUS_RDY)
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if (ATA_IN8(ATA_ALT_STATUS) & STATUS_RDY)
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return 1;
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last_disk_activity = current_tick;
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yield();
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@ -244,14 +275,14 @@ STATICIRAM ICODE_ATTR int wait_for_start_of_transfer(void)
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if (!wait_for_bsy())
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return 0;
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return (ATA_ALT_STATUS & (STATUS_BSY|STATUS_DRQ)) == STATUS_DRQ;
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return (ATA_IN8(ATA_ALT_STATUS) & (STATUS_BSY|STATUS_DRQ)) == STATUS_DRQ;
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}
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STATICIRAM ICODE_ATTR int wait_for_end_of_transfer(void)
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{
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if (!wait_for_bsy())
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return 0;
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return (ATA_ALT_STATUS &
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return (ATA_IN8(ATA_ALT_STATUS) &
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(STATUS_BSY|STATUS_RDY|STATUS_DF|STATUS_DRQ|STATUS_ERR))
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== STATUS_RDY;
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}
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@ -279,8 +310,8 @@ STATICIRAM ICODE_ATTR void copy_read_sectors(unsigned char* buf, int wordcount)
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unsigned char* bufend = buf + wordcount*2;
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do
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{
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tmp = ATA_DATA;
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#if defined(ATA_SWAP_WORDS) || defined(ROCKBOX_LITTLE_ENDIAN)
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tmp = ATA_IN16(ATA_DATA);
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#if defined(ROCKBOX_LITTLE_ENDIAN)
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*buf++ = tmp & 0xff; /* I assume big endian */
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*buf++ = tmp >> 8; /* and don't use the SWAB16 macro */
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#else
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@ -295,11 +326,7 @@ STATICIRAM ICODE_ATTR void copy_read_sectors(unsigned char* buf, int wordcount)
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unsigned short* wbufend = wbuf + wordcount;
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do
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{
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#ifdef ATA_SWAP_WORDS
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*wbuf = swap16(ATA_DATA);
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#else
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*wbuf = ATA_DATA;
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#endif
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*wbuf = ATA_IN16(ATA_DATA);
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} while (++wbuf < wbufend); /* tail loop is faster */
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}
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}
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@ -315,15 +342,14 @@ STATICIRAM ICODE_ATTR void copy_write_sectors(const unsigned char* buf,
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const unsigned char* bufend = buf + wordcount*2;
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do
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{
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#if defined(ATA_SWAP_WORDS) || defined(ROCKBOX_LITTLE_ENDIAN)
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#if defined(ROCKBOX_LITTLE_ENDIAN)
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tmp = (unsigned short) *buf++;
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tmp |= (unsigned short) *buf++ << 8;
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SET_16BITREG(ATA_DATA, tmp);
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#else
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tmp = (unsigned short) *buf++ << 8;
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tmp |= (unsigned short) *buf++;
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SET_16BITREG(ATA_DATA, tmp);
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#endif
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ATA_OUT16(ATA_DATA, tmp);
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} while (buf < bufend); /* tail loop is faster */
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}
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else
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@ -332,11 +358,7 @@ STATICIRAM ICODE_ATTR void copy_write_sectors(const unsigned char* buf,
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unsigned short* wbufend = wbuf + wordcount;
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do
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{
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#ifdef ATA_SWAP_WORDS
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SET_16BITREG(ATA_DATA, swap16(*wbuf));
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#else
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SET_16BITREG(ATA_DATA, *wbuf);
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#endif
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ATA_OUT16(ATA_DATA, *wbuf);
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} while (++wbuf < wbufend); /* tail loop is faster */
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}
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}
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@ -389,7 +411,7 @@ static int ata_transfer_sectors(unsigned long start,
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timeout = current_tick + READWRITE_TIMEOUT;
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SET_REG(ATA_SELECT, ata_device);
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ATA_OUT8(ATA_SELECT, ata_device);
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if (!wait_for_rdy())
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{
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ret = -3;
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@ -412,39 +434,39 @@ static int ata_transfer_sectors(unsigned long start,
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#ifdef HAVE_LBA48
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if (lba48)
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{
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SET_REG(ATA_NSECTOR, count >> 8);
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SET_REG(ATA_NSECTOR, count & 0xff);
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SET_REG(ATA_SECTOR, (start >> 24) & 0xff); /* 31:24 */
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SET_REG(ATA_SECTOR, start & 0xff); /* 7:0 */
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SET_REG(ATA_LCYL, 0); /* 39:32 */
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SET_REG(ATA_LCYL, (start >> 8) & 0xff); /* 15:8 */
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SET_REG(ATA_HCYL, 0); /* 47:40 */
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SET_REG(ATA_HCYL, (start >> 16) & 0xff); /* 23:16 */
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SET_REG(ATA_SELECT, SELECT_LBA | ata_device);
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ATA_OUT8(ATA_NSECTOR, count >> 8);
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ATA_OUT8(ATA_NSECTOR, count & 0xff);
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ATA_OUT8(ATA_SECTOR, (start >> 24) & 0xff); /* 31:24 */
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ATA_OUT8(ATA_SECTOR, start & 0xff); /* 7:0 */
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ATA_OUT8(ATA_LCYL, 0); /* 39:32 */
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ATA_OUT8(ATA_LCYL, (start >> 8) & 0xff); /* 15:8 */
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ATA_OUT8(ATA_HCYL, 0); /* 47:40 */
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ATA_OUT8(ATA_HCYL, (start >> 16) & 0xff); /* 23:16 */
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ATA_OUT8(ATA_SELECT, SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
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if (write)
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SET_REG(ATA_COMMAND, usedma ? CMD_WRITE_DMA_EXT : CMD_WRITE_MULTIPLE_EXT);
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_WRITE_DMA_EXT : CMD_WRITE_MULTIPLE_EXT);
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else
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SET_REG(ATA_COMMAND, usedma ? CMD_READ_DMA_EXT : CMD_READ_MULTIPLE_EXT);
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_READ_DMA_EXT : CMD_READ_MULTIPLE_EXT);
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#else
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SET_REG(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE_EXT : CMD_READ_MULTIPLE_EXT);
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ATA_OUT8(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE_EXT : CMD_READ_MULTIPLE_EXT);
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#endif
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}
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else
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#endif
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{
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SET_REG(ATA_NSECTOR, count & 0xff); /* 0 means 256 sectors */
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SET_REG(ATA_SECTOR, start & 0xff);
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SET_REG(ATA_LCYL, (start >> 8) & 0xff);
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SET_REG(ATA_HCYL, (start >> 16) & 0xff);
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SET_REG(ATA_SELECT, ((start >> 24) & 0xf) | SELECT_LBA | ata_device);
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ATA_OUT8(ATA_NSECTOR, count & 0xff); /* 0 means 256 sectors */
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ATA_OUT8(ATA_SECTOR, start & 0xff);
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ATA_OUT8(ATA_LCYL, (start >> 8) & 0xff);
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ATA_OUT8(ATA_HCYL, (start >> 16) & 0xff);
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ATA_OUT8(ATA_SELECT, ((start >> 24) & 0xf) | SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
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if (write)
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SET_REG(ATA_COMMAND, usedma ? CMD_WRITE_DMA : CMD_WRITE_MULTIPLE);
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_WRITE_DMA : CMD_WRITE_MULTIPLE);
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else
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SET_REG(ATA_COMMAND, usedma ? CMD_READ_DMA : CMD_READ_MULTIPLE);
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_READ_DMA : CMD_READ_MULTIPLE);
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#else
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SET_REG(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE : CMD_READ_MULTIPLE);
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ATA_OUT8(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE : CMD_READ_MULTIPLE);
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#endif
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}
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@ -501,10 +523,10 @@ static int ata_transfer_sectors(unsigned long start,
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}
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/* read the status register exactly once per loop */
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status = ATA_STATUS;
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error = ATA_ERROR;
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status = ATA_IN8(ATA_STATUS);
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error = ATA_IN8(ATA_ERROR);
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if (count >= multisectors )
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if (count >= multisectors)
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sectors = multisectors;
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else
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sectors = count;
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@ -543,7 +565,7 @@ static int ata_transfer_sectors(unsigned long start,
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if(!ret && !wait_for_end_of_transfer()) {
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int error;
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error = ATA_ERROR;
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error = ATA_IN8(ATA_ERROR);
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perform_soft_reset();
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ret = -4;
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/* no point retrying IDNF, sector no. was invalid */
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@ -767,20 +789,23 @@ int ata_write_sectors(IF_MD2(int drive,)
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static int check_registers(void)
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{
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int i;
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if ( ATA_STATUS & STATUS_BSY )
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wait_for_bsy();
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if (ATA_IN8(ATA_STATUS) & STATUS_BSY)
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return -1;
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for (i = 0; i<64; i++) {
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SET_REG(ATA_NSECTOR, WRITE_PATTERN1);
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SET_REG(ATA_SECTOR, WRITE_PATTERN2);
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SET_REG(ATA_LCYL, WRITE_PATTERN3);
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SET_REG(ATA_HCYL, WRITE_PATTERN4);
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ATA_OUT8(ATA_NSECTOR, TEST_PATTERN1);
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ATA_OUT8(ATA_SECTOR, TEST_PATTERN2);
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ATA_OUT8(ATA_LCYL, TEST_PATTERN3);
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ATA_OUT8(ATA_HCYL, TEST_PATTERN4);
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if (((ATA_NSECTOR & READ_PATTERN1_MASK) == READ_PATTERN1) &&
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((ATA_SECTOR & READ_PATTERN2_MASK) == READ_PATTERN2) &&
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((ATA_LCYL & READ_PATTERN3_MASK) == READ_PATTERN3) &&
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((ATA_HCYL & READ_PATTERN4_MASK) == READ_PATTERN4))
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if ((ATA_IN8(ATA_NSECTOR) == TEST_PATTERN1) &&
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(ATA_IN8(ATA_SECTOR) == TEST_PATTERN2) &&
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(ATA_IN8(ATA_LCYL) == TEST_PATTERN3) &&
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(ATA_IN8(ATA_HCYL) == TEST_PATTERN4))
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return 0;
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sleep(1);
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}
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return -2;
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}
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@ -790,12 +815,12 @@ static int freeze_lock(void)
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/* does the disk support Security Mode feature set? */
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if (identify_info[82] & 2)
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{
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SET_REG(ATA_SELECT, ata_device);
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ATA_OUT8(ATA_SELECT, ata_device);
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if (!wait_for_rdy())
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return -1;
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SET_REG(ATA_COMMAND, CMD_SECURITY_FREEZE_LOCK);
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ATA_OUT8(ATA_COMMAND, CMD_SECURITY_FREEZE_LOCK);
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if (!wait_for_rdy())
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return -2;
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@ -822,14 +847,14 @@ static int ata_perform_sleep(void)
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return 0;
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}
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SET_REG(ATA_SELECT, ata_device);
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ATA_OUT8(ATA_SELECT, ata_device);
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if(!wait_for_rdy()) {
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DEBUGF("ata_perform_sleep() - not RDY\n");
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return -1;
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}
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SET_REG(ATA_COMMAND, CMD_SLEEP);
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ATA_OUT8(ATA_COMMAND, CMD_SLEEP);
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if (!wait_for_rdy())
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{
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@ -989,7 +1014,7 @@ static int ata_hard_reset(void)
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ata_reset();
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/* state HRR2 */
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SET_REG(ATA_SELECT, ata_device); /* select the right device */
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ATA_OUT8(ATA_SELECT, ata_device); /* select the right device */
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ret = wait_for_bsy();
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/* Massage the return code so it is 0 on success and -1 on failure */
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@ -1010,15 +1035,15 @@ static int perform_soft_reset(void)
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int ret;
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int retry_count;
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SET_REG(ATA_SELECT, SELECT_LBA | ata_device );
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SET_REG(ATA_CONTROL, CONTROL_nIEN|CONTROL_SRST );
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ATA_OUT8(ATA_SELECT, SELECT_LBA | ata_device );
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ATA_OUT8(ATA_CONTROL, CONTROL_nIEN|CONTROL_SRST );
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sleep(1); /* >= 5us */
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#ifdef HAVE_ATA_DMA
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/* DMA requires INTRQ be enabled */
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SET_REG(ATA_CONTROL, 0);
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ATA_OUT8(ATA_CONTROL, 0);
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#else
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SET_REG(ATA_CONTROL, CONTROL_nIEN);
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ATA_OUT8(ATA_CONTROL, CONTROL_nIEN);
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#endif
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sleep(1); /* >2ms */
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@ -1089,15 +1114,15 @@ static int ata_power_on(void)
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static int master_slave_detect(void)
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{
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/* master? */
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SET_REG(ATA_SELECT, 0);
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if ( ATA_STATUS & (STATUS_RDY|STATUS_BSY) ) {
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ATA_OUT8(ATA_SELECT, 0);
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if (ATA_IN8(ATA_STATUS) & (STATUS_RDY|STATUS_BSY)) {
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ata_device = 0;
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DEBUGF("Found master harddisk\n");
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}
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else {
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/* slave? */
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SET_REG(ATA_SELECT, SELECT_DEVICE1);
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if ( ATA_STATUS & (STATUS_RDY|STATUS_BSY) ) {
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ATA_OUT8(ATA_SELECT, SELECT_DEVICE1);
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if (ATA_IN8(ATA_STATUS) & (STATUS_RDY|STATUS_BSY)) {
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ata_device = SELECT_DEVICE1;
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DEBUGF("Found slave harddisk\n");
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}
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@ -1111,13 +1136,13 @@ static int identify(void)
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{
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int i;
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SET_REG(ATA_SELECT, ata_device);
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ATA_OUT8(ATA_SELECT, ata_device);
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if(!wait_for_rdy()) {
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DEBUGF("identify() - not RDY\n");
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return -1;
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}
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SET_REG(ATA_COMMAND, CMD_IDENTIFY);
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ATA_OUT8(ATA_COMMAND, CMD_IDENTIFY);
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if (!wait_for_start_of_transfer())
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{
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@ -1128,11 +1153,7 @@ static int identify(void)
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for (i=0; i<SECTOR_SIZE/2; i++) {
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/* the IDENTIFY words are already swapped, so we need to treat
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this info differently that normal sector data */
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#if defined(ROCKBOX_BIG_ENDIAN) && !defined(ATA_SWAP_WORDS)
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identify_info[i] = swap16(ATA_DATA);
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#else
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identify_info[i] = ATA_DATA;
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#endif
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identify_info[i] = ATA_SWAP_IDENTIFY(ATA_IN16(ATA_DATA));
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}
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return 0;
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@ -1140,15 +1161,15 @@ static int identify(void)
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static int set_multiple_mode(int sectors)
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{
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SET_REG(ATA_SELECT, ata_device);
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ATA_OUT8(ATA_SELECT, ata_device);
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if(!wait_for_rdy()) {
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DEBUGF("set_multiple_mode() - not RDY\n");
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return -1;
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}
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SET_REG(ATA_NSECTOR, sectors);
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SET_REG(ATA_COMMAND, CMD_SET_MULTIPLE_MODE);
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ATA_OUT8(ATA_NSECTOR, sectors);
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ATA_OUT8(ATA_COMMAND, CMD_SET_MULTIPLE_MODE);
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if (!wait_for_rdy())
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{
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@ -1221,7 +1242,7 @@ static int set_features(void)
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features[4].parameter = dma_mode;
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#endif /* HAVE_ATA_DMA */
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SET_REG(ATA_SELECT, ata_device);
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ATA_OUT8(ATA_SELECT, ata_device);
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if (!wait_for_rdy()) {
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DEBUGF("set_features() - not RDY\n");
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@ -1230,19 +1251,19 @@ static int set_features(void)
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for (i=0; i < (int)(sizeof(features)/sizeof(features[0])); i++) {
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if (identify_info[features[i].id_word] & BIT_N(features[i].id_bit)) {
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SET_REG(ATA_FEATURE, features[i].subcommand);
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SET_REG(ATA_NSECTOR, features[i].parameter);
|
||||
SET_REG(ATA_COMMAND, CMD_SET_FEATURES);
|
||||
ATA_OUT8(ATA_FEATURE, features[i].subcommand);
|
||||
ATA_OUT8(ATA_NSECTOR, features[i].parameter);
|
||||
ATA_OUT8(ATA_COMMAND, CMD_SET_FEATURES);
|
||||
|
||||
if (!wait_for_rdy()) {
|
||||
DEBUGF("set_features() - CMD failed\n");
|
||||
return -10 - i;
|
||||
}
|
||||
|
||||
if((ATA_ALT_STATUS & STATUS_ERR) && (i != 1)) {
|
||||
if((ATA_IN8(ATA_ALT_STATUS) & STATUS_ERR) && (i != 1)) {
|
||||
/* some CF cards don't like advanced powermanagement
|
||||
even if they mark it as supported - go figure... */
|
||||
if(ATA_ERROR & ERROR_ABRT) {
|
||||
if(ATA_IN8(ATA_ERROR) & ERROR_ABRT) {
|
||||
return -20 - i;
|
||||
}
|
||||
}
|
||||
|
|
@ -1327,7 +1348,7 @@ int ata_init(void)
|
|||
|
||||
#ifdef HAVE_ATA_DMA
|
||||
/* DMA requires INTRQ be enabled */
|
||||
SET_REG(ATA_CONTROL, 0);
|
||||
ATA_OUT8(ATA_CONTROL, 0);
|
||||
#endif
|
||||
|
||||
/* first try, hard reset at cold start only */
|
||||
|
|
@ -1335,9 +1356,9 @@ int ata_init(void)
|
|||
|
||||
if (rc)
|
||||
{ /* failed? -> second try, always with hard reset */
|
||||
DEBUGF("ata: init failed, retrying...\n");
|
||||
rc = init_and_check(true);
|
||||
if (rc)
|
||||
// DEBUGF("ata: init failed, retrying...\n");
|
||||
// rc = init_and_check(true);
|
||||
// if (rc)
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
|
@ -1469,7 +1490,6 @@ void ata_get_info(IF_MD2(int drive,)struct storage_info *info)
|
|||
#endif
|
||||
int i;
|
||||
info->sector_size = SECTOR_SIZE;
|
||||
info->num_sectors= total_sectors;
|
||||
|
||||
src = (unsigned short*)&identify_info[27];
|
||||
dest = (unsigned short*)vendor;
|
||||
|
|
|
|||
|
|
@ -33,32 +33,6 @@
|
|||
#define ATA_CONTROL (*((volatile unsigned char*)(ATA_IOBASE + 0x340)))
|
||||
#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x380)))
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_enable(bool on);
|
||||
bool ata_is_coldstart(void);
|
||||
|
|
|
|||
|
|
@ -32,43 +32,16 @@
|
|||
#define ATA_COMMAND (*((volatile unsigned char*)(IDE_BASE + 0x1fc)))
|
||||
#define ATA_CONTROL (*((volatile unsigned char*)(IDE_BASE + 0x3f8)))
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#if (CONFIG_CPU == PP5002)
|
||||
|
||||
#define SET_REG(reg,val) do { reg = (val); \
|
||||
#define ATA_OUT8(reg,val) do { reg = (val); \
|
||||
while (!(IDE_CFG_STATUS & 0x40)); \
|
||||
} while (0)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
} while (0)
|
||||
|
||||
/* Plain C reading and writing. See comment in ata-as-arm.S */
|
||||
|
||||
#elif defined CPU_PP502x
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
/* asm optimized reading and writing */
|
||||
#define ATA_OPTIMIZED_READING
|
||||
#define ATA_OPTIMIZED_WRITING
|
||||
|
|
|
|||
|
|
@ -46,32 +46,6 @@
|
|||
#define ATA_COMMAND ATA_DRIVE_COMMAND
|
||||
#define ATA_CONTROL ATA_DRIVE_CONTROL
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_device_init(void);
|
||||
bool ata_is_coldstart(void);
|
||||
|
|
|
|||
|
|
@ -44,32 +44,6 @@ void copy_read_sectors(unsigned char* buf, int wordcount);
|
|||
#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x0E)))
|
||||
#define ATA_CONTROL (*((volatile unsigned char*)(0x20000000 + 0x1C)))
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_device_init(void);
|
||||
bool ata_is_coldstart(void);
|
||||
|
|
|
|||
|
|
@ -53,32 +53,6 @@ extern int _ata_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
|
|||
#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE+0xE)))
|
||||
#define ATA_CONTROL (*((volatile unsigned char*)(ATA_IOBASE+0x800C)))
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_device_init(void);
|
||||
bool ata_is_coldstart(void);
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ void dma_ata_read(unsigned char* buf, int shortcount)
|
|||
while((unsigned long)buf & 0x1F)
|
||||
{
|
||||
unsigned short tmp;
|
||||
tmp = ATA_DATA;
|
||||
tmp = ATA_IN16(ATA_DATA);
|
||||
*buf++ = tmp & 0xFF;
|
||||
*buf++ = tmp >> 8;
|
||||
shortcount--;
|
||||
|
|
@ -86,7 +86,7 @@ void dma_ata_read(unsigned char* buf, int shortcount)
|
|||
if(shortcount % 2)
|
||||
{
|
||||
unsigned short tmp;
|
||||
tmp = ATA_DATA;
|
||||
tmp = ATA_IN16(ATA_DATA);
|
||||
*buf++ = tmp & 0xFF;
|
||||
*buf++ = tmp >> 8;
|
||||
}
|
||||
|
|
@ -102,7 +102,7 @@ void dma_ata_write(unsigned char* buf, int wordcount)
|
|||
unsigned short tmp;
|
||||
tmp = (unsigned short) *buf++;
|
||||
tmp |= (unsigned short) *buf++ << 8;
|
||||
SET_16BITREG(ATA_DATA, tmp);
|
||||
ATA_OUT16(ATA_DATA, tmp);
|
||||
wordcount--;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -49,32 +49,6 @@ void copy_write_sectors(const unsigned char* buf, int wordcount);
|
|||
#define ATA_COMMAND (*((volatile unsigned char*)(REGISTER_OFFSET + (0x07 << IDE_SHIFT))))
|
||||
#define ATA_CONTROL (*((volatile unsigned char*)(CONTROL_OFFSET + (0x06 << IDE_SHIFT))))
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_device_init(void);
|
||||
bool ata_is_coldstart(void);
|
||||
|
|
|
|||
|
|
@ -37,32 +37,10 @@
|
|||
#define ATA_SELECT (*((volatile unsigned short*)(ATA_IOBASE + 0x2c)))
|
||||
#define ATA_COMMAND (*((volatile unsigned short*)(ATA_IOBASE + 0x2e)))
|
||||
|
||||
#define STATUS_BSY 0x8000
|
||||
#define STATUS_RDY 0x4000
|
||||
#define STATUS_DF 0x2000
|
||||
#define STATUS_DRQ 0x0800
|
||||
#define STATUS_ERR 0x0100
|
||||
|
||||
#define ERROR_ABRT 0x0400
|
||||
#define ERROR_IDNF 0x1000
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa500
|
||||
#define READ_PATTERN2 0x5a00
|
||||
#define READ_PATTERN3 0xaa00
|
||||
#define READ_PATTERN4 0x5500
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff00
|
||||
#define READ_PATTERN2_MASK 0xff00
|
||||
#define READ_PATTERN3_MASK 0xff00
|
||||
#define READ_PATTERN4_MASK 0xff00
|
||||
|
||||
#define SET_REG(reg,val) reg = ((val) << 8)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
#define ATA_OUT8(reg,val) reg = ((val) << 8)
|
||||
#define ATA_OUT16(reg,val) reg = swap16(val)
|
||||
#define ATA_IN8(reg) ((reg) >> 8)
|
||||
#define ATA_IN16(reg) (swap16(reg))
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_enable(bool on);
|
||||
|
|
|
|||
|
|
@ -36,34 +36,6 @@
|
|||
#define ATA_SELECT (*((volatile unsigned short*)(ATA_IOBASE + 0x2c)))
|
||||
#define ATA_COMMAND (*((volatile unsigned short*)(ATA_IOBASE + 0x2e)))
|
||||
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
void ata_reset(void);
|
||||
void ata_enable(bool on);
|
||||
void ata_device_init(void);
|
||||
|
|
|
|||
|
|
@ -39,33 +39,6 @@
|
|||
#define ATA_SELECT (*((volatile unsigned char*)ATA_IOBASE + 6))
|
||||
#define ATA_COMMAND (*((volatile unsigned char*)ATA_IOBASE + 7))
|
||||
|
||||
#define STATUS_BSY 0x80
|
||||
#define STATUS_RDY 0x40
|
||||
#define STATUS_DF 0x20
|
||||
#define STATUS_DRQ 0x08
|
||||
#define STATUS_ERR 0x01
|
||||
|
||||
#define ERROR_ABRT 0x04
|
||||
#define ERROR_IDNF 0x10
|
||||
|
||||
#define WRITE_PATTERN1 0xa5
|
||||
#define WRITE_PATTERN2 0x5a
|
||||
#define WRITE_PATTERN3 0xaa
|
||||
#define WRITE_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1 0xa5
|
||||
#define READ_PATTERN2 0x5a
|
||||
#define READ_PATTERN3 0xaa
|
||||
#define READ_PATTERN4 0x55
|
||||
|
||||
#define READ_PATTERN1_MASK 0xff
|
||||
#define READ_PATTERN2_MASK 0xff
|
||||
#define READ_PATTERN3_MASK 0xff
|
||||
#define READ_PATTERN4_MASK 0xff
|
||||
|
||||
#define SET_REG(reg,val) reg = (val)
|
||||
#define SET_16BITREG(reg,val) reg = (val)
|
||||
|
||||
extern volatile unsigned char* ata_control;
|
||||
|
||||
void ata_reset(void);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue