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rk27xx - fix (hopefully) adc readings
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30164 a1c6a512-1295-4272-9138-f99709370657
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1 changed files with 12 additions and 6 deletions
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@ -11,7 +11,7 @@
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*
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*
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* This program is free software; you can redistribute it and/or
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* as published by the Free Software Foundation; either version 1
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* of the License, or (at your option) any later version.
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* of the License, or (at your option) any later version.
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*
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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@ -28,10 +28,16 @@
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unsigned int adc_scan(int channel)
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unsigned int adc_scan(int channel)
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{
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{
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ADC_CTRL = (1<<4) | (1<<3) | (channel & (NUM_ADC_CHANNELS - 1));
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ADC_CTRL = (1<<4)|(1<<3) | (channel & (NUM_ADC_CHANNELS - 1));
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/* wait for conversion ready ~10us */
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/* Wait for conversion ready.
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while (ADC_STAT & 0x01);
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* The doc says one should pool ADC_STAT for end of conversion
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* or setup interrupt. Neither of these two methods work as
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* advertised.
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*
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* ~10us should be enough so we wait 20us to be on the safe side
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*/
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udelay(20);
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/* 10bits result */
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/* 10bits result */
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return (ADC_DATA & 0x3ff);
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return (ADC_DATA & 0x3ff);
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@ -43,5 +49,5 @@ void adc_init(void)
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SCU_DIVCON1 = (SCU_DIVCON1 & ~(0xff<<10)) | (49<<10);
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SCU_DIVCON1 = (SCU_DIVCON1 & ~(0xff<<10)) | (49<<10);
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/* enable clocks for ADC */
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/* enable clocks for ADC */
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SCU_CLKCFG |= 3<<23;
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SCU_CLKCFG &= ~(3<<23);
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}
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}
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