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Adjust iPod Nano 2G CPU speed to 192MHz, which measurements show it to be. Timers will be more accurate now.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23237 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann 2009-10-17 22:32:46 +00:00
parent 47e06dfe9e
commit 8f1709f434
3 changed files with 6 additions and 5 deletions
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2
firmware/export/config-ipodnano2g.h
View file

@ -147,7 +147,7 @@
#define FLASH_SIZE 0x400000 #define FLASH_SIZE 0x400000
/* Define this to the CPU frequency */ /* Define this to the CPU frequency */
#define CPU_FREQ 200000000 #define CPU_FREQ 192000000
/* Define this if you have ATA power-off control */ /* Define this if you have ATA power-off control */
//#define HAVE_ATA_POWER_OFF //#define HAVE_ATA_POWER_OFF

3
firmware/export/s5l8700.h
View file

@ -25,7 +25,7 @@
#define REG16_PTR_T volatile uint16_t * #define REG16_PTR_T volatile uint16_t *
#define REG32_PTR_T volatile uint32_t * #define REG32_PTR_T volatile uint32_t *
#define TIMER_FREQ 50000000L #define TIMER_FREQ 48000000L
/* 04. CALMADM2E */ /* 04. CALMADM2E */
@ -132,6 +132,7 @@
#define INTMSK_TIMERC (1<<5) #define INTMSK_TIMERC (1<<5)
#define INTMSK_TIMERD (1<<5) #define INTMSK_TIMERD (1<<5)
#define INTMSK_ECC (1<<19) #define INTMSK_ECC (1<<19)
#define INTMSK_USB_OTG (1<<16)
#else #else
#define INTMSK_TIMERA (1<<5) #define INTMSK_TIMERA (1<<5)
#define INTMSK_TIMERB (1<<7) #define INTMSK_TIMERB (1<<7)

6
firmware/target/arm/s5l8700/kernel-s5l8700.c
View file

@ -24,7 +24,7 @@
/* S5L8700 driver for the kernel timer /* S5L8700 driver for the kernel timer
Timer B is configured as a 10 kHz timer (assuming PCLK = 100 MHz) Timer B is configured as a 10 kHz timer (assuming PCLK = 48 MHz)
*/ */
void INT_TIMERB(void) void INT_TIMERB(void)
@ -37,14 +37,14 @@ void INT_TIMERB(void)
void tick_start(unsigned int interval_in_ms) void tick_start(unsigned int interval_in_ms)
{ {
int cycles = 5 * interval_in_ms; int cycles = 10 * interval_in_ms;
/* enable timer clock */ /* enable timer clock */
PWRCON &= ~(1 << 4); PWRCON &= ~(1 << 4);
/* configure timer for 10 kHz */ /* configure timer for 10 kHz */
TBCMD = (1 << 1); /* TB_CLR */ TBCMD = (1 << 1); /* TB_CLR */
TBPRE = 625 - 1; /* prescaler */ TBPRE = 300 - 1; /* prescaler */
TBCON = (0 << 13) | /* TB_INT1_EN */ TBCON = (0 << 13) | /* TB_INT1_EN */
(1 << 12) | /* TB_INT0_EN */ (1 << 12) | /* TB_INT0_EN */
(0 << 11) | /* TB_START */ (0 << 11) | /* TB_START */