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ErosQ Native ES9018K2M: Add digital filters capability
Setting not yet hidden for older hardware revision. Change-Id: Iaaa5727e63c38de578a6bbc73498ae1073180e65
This commit is contained in:
Dana Conrad
Aidan MacDonald
parent
a3fe07ff12
commit
8cc7476735
5 changed files with 70 additions and 8 deletions
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@ -186,7 +186,7 @@ depth_3d
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#endif
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/* This should be AUDIOHW_HAVE_FILTER_ROLL_OFF but that is only defined later */
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#if defined(DX50) || defined(HAVE_DF1704_CODEC) || defined(HAVE_PCM1792_CODEC) || defined(HAVE_CS4398) || defined(HAVE_WM8740) || defined(HAVE_ES9018) || defined(HAVE_XDUOO_LINUX_CODEC) || defined(HAVE_FIIO_LINUX_CODEC) || defined(HAVE_AK4376) || defined(HAVE_ES9218)
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#if defined(DX50) || defined(HAVE_DF1704_CODEC) || defined(HAVE_PCM1792_CODEC) || defined(HAVE_CS4398) || defined(HAVE_WM8740) || defined(HAVE_ES9018)|| defined(HAVE_EROS_QN_CODEC) || defined(HAVE_XDUOO_LINUX_CODEC) || defined(HAVE_FIIO_LINUX_CODEC) || defined(HAVE_AK4376) || defined(HAVE_ES9218)
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filter_roll_off
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#endif
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@ -195,7 +195,7 @@ filter_roll_off
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dac_power_mode
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#endif
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#if defined(HAVE_ES9018)
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#if defined(HAVE_ES9018) || defined(HAVE_EROS_QN_CODEC)
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es9018
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#endif
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@ -55,15 +55,20 @@ static int vol_tenthdb2hw(const int tdb)
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* static uint8_t reg4_automute_time = 0x00; // Automute time. Default = disabled
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* static uint8_t reg5_automute_level = 0x68; // Automute level. Default is some level
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* static uint8_t reg6_deemphasis = 0x4A; // Deemphasis. Default = disabled
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* static uint8_t reg7_general_settings = 0x80; // General settings. Default sharp fir, pcm iir and unmuted
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*/
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static uint8_t reg7_general_settings = 0x80; // General settings. Default sharp fir, pcm iir and unmuted
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/*
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* static uint8_t reg8_gpio_configuration = 0x10; // GPIO configuration
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* static uint8_t reg10_master_mode_control = 0x05; // Master Mode Control. Default value: master mode off
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* static uint8_t reg11_channel_mapping = 0x02; // Channel Mapping. Default stereo is Ch1=left, Ch2=right
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* static uint8_t reg12_dpll_settings = 0x5A; // DPLL Settings. Default = 5 for I2S, A for DSD
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* static uint8_t reg13_thd_comp = 0x40; // THD Compensation
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* static uint8_t reg14_softstart_settings = 0x8A; // Soft Start Settings
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* static uint8_t reg21_gpio_input_selection = 0x00; // Oversampling filter. Default: oversampling ON
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*/
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static uint8_t reg21_gpio_input_selection = 0x00; // Oversampling filter. Default: oversampling ON
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#define bitSet(value, bit) ((value) |= (1UL << (bit)))
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#define bitClear(value, bit) ((value) &= ~(1UL << (bit)))
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static uint8_t vol_reg_l = ES9018K2M_REG15_VOLUME_L;
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static uint8_t reg15_vol_l = 0;
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@ -95,7 +100,7 @@ i2c_descriptor vol_desc_r = {
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.next = NULL,
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};
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void es9018k2m_set_volume(int vol_l, int vol_r)
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void es9018k2m_set_volume_async(int vol_l, int vol_r)
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{
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/* Queue writes to the DAC's volume.
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* Note that this needs to be done asynchronously. From testing, calling
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@ -106,6 +111,43 @@ void es9018k2m_set_volume(int vol_l, int vol_r)
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i2c_async_queue(ES9018K2M_BUS, TIMEOUT_NOBLOCK, I2C_Q_ADD, 0, &vol_desc_r);
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}
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void es9018k2m_set_filter_roll_off(int value)
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{
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/* Note: the ihifi800 implementation manipulates
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* bit 0 of reg21, but I think that is incorrect?
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* Bit 2 is the bypass for the IIR digital filters,
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* Whereas Bit 0 is the oversampling filter, which
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* the datasheet seems to say should be left on. */
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/* 0 = "Sharp" / Fast Rolloff (Default)
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1 = Slow Rolloff
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2 = "Short" / Minimum Phase
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3 = Bypass */
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switch(value)
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{
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case 0:
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bitClear(reg7_general_settings, 5);
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bitClear(reg7_general_settings, 6);
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bitClear(reg21_gpio_input_selection, 2);
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break;
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case 1:
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bitSet(reg7_general_settings, 5);
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bitClear(reg7_general_settings, 6);
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bitClear(reg21_gpio_input_selection, 2);
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break;
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case 2:
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bitClear(reg7_general_settings, 5);
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bitSet(reg7_general_settings, 6);
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bitClear(reg21_gpio_input_selection, 2);
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break;
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case 3:
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bitSet(reg21_gpio_input_selection, 2);
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break;
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}
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es9018k2m_write_reg(ES9018K2M_REG7_GENERAL_SETTINGS, reg7_general_settings);
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es9018k2m_write_reg(ES9018K2M_REG21_GPIO_INPUT_SELECT, reg21_gpio_input_selection);
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}
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/* returns I2C_STATUS_OK upon success, I2C_STATUS_* errors upon error */
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int es9018k2m_write_reg(uint8_t reg, uint8_t val)
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{
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@ -63,6 +63,8 @@
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#define HAVE_EROS_QN_CODEC
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#define HAVE_SW_TONE_CONTROLS
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#define HAVE_SW_VOLUME_CONTROL
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#define AUDIOHW_CAPS (FILTER_ROLL_OFF_CAP)
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#define AUDIOHW_HAVE_SHORT_ROLL_OFF
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/* use high-bitdepth volume scaling */
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#define PCM_NATIVE_BITDEPTH 24
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@ -25,6 +25,13 @@
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//======================================================================================
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// ES9018K2M support stuff
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// Implement audiohw_* functions in audiohw-*.c. These functions are utilities which
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// may be used there.
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// AUDIOHW_SETTING(VOLUME, *) not set here, probably best to put it in device-specific *_codec.h
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#ifdef AUDIOHW_HAVE_SHORT_ROLL_OFF
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AUDIOHW_SETTING(FILTER_ROLL_OFF, "", 0, 1, 0, 3, 0)
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#endif
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#ifndef ES9018K2M_VOLUME_MIN
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# define ES9018K2M_VOLUME_MIN -1270
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@ -50,8 +57,11 @@
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#define ES9018K2M_REG16_VOLUME_R 16
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#define ES9018K2M_REG21_GPIO_INPUT_SELECT 21
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/* writes volume levels to DAC over I2C */
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void es9018k2m_set_volume(int vol_l, int vol_r);
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/* writes volume levels to DAC over I2C, asynchronously */
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void es9018k2m_set_volume_async(int vol_l, int vol_r);
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/* write filter roll-off setting to DAC over I2C, synchronously */
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void es9018k2m_set_filter_roll_off(int value);
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/* writes a single register */
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/* returns I2C_STATUS_OK upon success, I2C_STATUS_* errors upon error */
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@ -162,7 +162,7 @@ void audiohw_set_volume(int vol_l, int vol_r)
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/* set software volume just below unity due to
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* DAC offset. We don't want to overflow the PCM system. */
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pcm_set_master_volume(-1, -1);
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es9018k2m_set_volume(l, r);
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es9018k2m_set_volume_async(l, r);
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}
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else /* PCM5102A */
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{
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@ -171,4 +171,12 @@ void audiohw_set_volume(int vol_l, int vol_r)
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pcm_set_master_volume(l, r);
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}
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}
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void audiohw_set_filter_roll_off(int value)
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{
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if (es9018k2m_present_flag)
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{
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es9018k2m_set_filter_roll_off(value);
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}
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}
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