len0rd/rockbox
1
0
Fork 1
mirror of https://github.com/Rockbox/rockbox.git synced 2025-12-10 13:45:10 -05:00
Code Issues Projects Releases Packages Wiki Activity Actions

Get rid of remaining audiohw_enable_output style codec setup and use pre/post split initialization. Move some SoC-specific code like i2s_reset out of the codec drivers. Helps to unify drivers and it was only ever used to enable. I cannot possibly test everything so report (I'll be on call ;) or fix problems if any crop up.

Browse source 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19228 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2008-11-26 14:25:45 +00:00
parent e73383ea32
commit 888451fb0f
16 changed files with 77 additions and 159 deletions
Download patch file Download diff file Expand all files Collapse all files

11
firmware/drivers/audio/tsc2100.c
View file

@ -90,16 +90,7 @@ void audiohw_init(void)
void audiohw_postinit(void) void audiohw_postinit(void)
{ {
} audiohw_mute(0);
/* Silently enable / disable audio output */
void audiohw_enable_output(bool enable)
{
if (enable) {
audiohw_mute(0);
} else {
audiohw_mute(1);
}
} }
void audiohw_set_master_vol(int vol_l, int vol_r) void audiohw_set_master_vol(int vol_l, int vol_r)

14
firmware/drivers/audio/uda1380.c
View file

@ -193,17 +193,6 @@ static int audiohw_set_regs(void)
return 0; return 0;
} }
/* Silently enable / disable audio output */
void audiohw_enable_output(bool enable)
{
if (enable) {
uda1380_write_reg(REG_PWR, uda1380_regs[REG_PWR] | PON_DAC | PON_HP);
} else {
uda1380_write_reg(REG_MUTE, MUTE_MASTER);
uda1380_write_reg(REG_PWR, uda1380_regs[REG_PWR] & ~PON_DAC);
}
}
static void reset(void) static void reset(void)
{ {
#ifdef IRIVER_H300_SERIES #ifdef IRIVER_H300_SERIES
@ -278,8 +267,9 @@ void audiohw_postinit(void)
/* Sleep a while so the power can stabilize (especially a long /* Sleep a while so the power can stabilize (especially a long
delay is needed for the line out connector). */ delay is needed for the line out connector). */
sleep(HZ); sleep(HZ);
/* Power on FSDAC and HP amp. */ /* Power on FSDAC and HP amp. */
audiohw_enable_output(true); uda1380_write_reg(REG_PWR, uda1380_regs[REG_PWR] | PON_DAC | PON_HP);
/* UDA1380: Unmute the master channel /* UDA1380: Unmute the master channel
(DAC should be at zero point now). */ (DAC should be at zero point now). */

50
firmware/drivers/audio/wm8721.c
View file

@ -33,7 +33,6 @@
#include "wmcodec.h" #include "wmcodec.h"
#include "audiohw.h" #include "audiohw.h"
#include "i2s.h"
#define IPOD_PCM_LEVEL 0x65 /* -6dB */ #define IPOD_PCM_LEVEL 0x65 /* -6dB */
@ -91,43 +90,38 @@ static void codec_set_active(int active)
/* Silently enable / disable audio output */ /* Silently enable / disable audio output */
void audiohw_enable_output(bool enable) void audiohw_preinit(void)
{ {
if (enable) wmcodec_write(RESET, 0x0); /*Reset*/
{
/* reset the I2S controller into known state */
i2s_reset();
wmcodec_write(RESET, 0x0); /*Reset*/ codec_set_active(0x0);
codec_set_active(0x0); /* DACSEL=1 */
wmcodec_write(0x4, 0x10);
/* DACSEL=1 */ /* set power register to POWEROFF=0 on OUTPD=0, DACPD=0 */
wmcodec_write(0x4, 0x10); wmcodec_write(PDCTRL, 0x67);
/* set power register to POWEROFF=0 on OUTPD=0, DACPD=0 */ /* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */
wmcodec_write(PDCTRL, 0x67); /* IWL=00(16 bit) FORMAT=10(I2S format) */
wmcodec_write(AINTFCE, 0x42);
/* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */ audiohw_set_sample_rate(WM8721_USB24_44100HZ);
/* IWL=00(16 bit) FORMAT=10(I2S format) */
wmcodec_write(AINTFCE, 0x42);
audiohw_set_sample_rate(WM8721_USB24_44100HZ); /* set the volume to -6dB */
wmcodec_write(LOUTVOL, IPOD_PCM_LEVEL);
wmcodec_write(ROUTVOL, 0x100 | IPOD_PCM_LEVEL);
/* set the volume to -6dB */ /* ACTIVE=1 */
wmcodec_write(LOUTVOL, IPOD_PCM_LEVEL); codec_set_active(1);
wmcodec_write(ROUTVOL, 0x100 | IPOD_PCM_LEVEL);
/* ACTIVE=1 */ /* 5. Set DACMU = 0 to soft-un-mute the audio DACs. */
codec_set_active(1); wmcodec_write(DAPCTRL, 0x0);
}
/* 5. Set DACMU = 0 to soft-un-mute the audio DACs. */ void audiohw_postinit(void)
wmcodec_write(DAPCTRL, 0x0); {
audiohw_mute(0);
audiohw_mute(0);
} else {
audiohw_mute(1);
}
} }
void audiohw_set_master_vol(int vol_l, int vol_r) void audiohw_set_master_vol(int vol_l, int vol_r)

3
firmware/drivers/audio/wm8731.c
View file

@ -33,7 +33,6 @@
#include "wmcodec.h" #include "wmcodec.h"
#include "audiohw.h" #include "audiohw.h"
#include "i2s.h"
#include "sound.h" #include "sound.h"
const struct sound_settings_info audiohw_settings[] = { const struct sound_settings_info audiohw_settings[] = {
@ -150,8 +149,6 @@ static void codec_set_active(int active)
void audiohw_preinit(void) void audiohw_preinit(void)
{ {
i2s_reset();
/* POWER UP SEQUENCE */ /* POWER UP SEQUENCE */
/* 1) Switch on power supplies. By default the WM8731 is in Standby Mode, /* 1) Switch on power supplies. By default the WM8731 is in Standby Mode,
* the DAC is digitally muted and the Audio Interface and Outputs are * the DAC is digitally muted and the Audio Interface and Outputs are

1
firmware/drivers/audio/wm8751.c
View file

@ -27,7 +27,6 @@
****************************************************************************/ ****************************************************************************/
#include "kernel.h" #include "kernel.h"
#include "wmcodec.h" #include "wmcodec.h"
#include "i2s.h"
#include "audio.h" #include "audio.h"
#include "audiohw.h" #include "audiohw.h"
#include "system.h" #include "system.h"

3
firmware/drivers/audio/wm8758.c
View file

@ -31,7 +31,6 @@
#include "wmcodec.h" #include "wmcodec.h"
#include "audiohw.h" #include "audiohw.h"
#include "i2s.h"
const struct sound_settings_info audiohw_settings[] = { const struct sound_settings_info audiohw_settings[] = {
[SOUND_VOLUME] = {"dB", 0, 1, -58, 6, -25}, [SOUND_VOLUME] = {"dB", 0, 1, -58, 6, -25},
@ -95,8 +94,6 @@ void audiohw_mute(bool mute)
void audiohw_preinit(void) void audiohw_preinit(void)
{ {
i2s_reset();
wmcodec_write(RESET, RESET_RESET); wmcodec_write(RESET, RESET_RESET);
wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN

3
firmware/drivers/audio/wm8975.c
View file

@ -33,7 +33,6 @@
#include "wmcodec.h" #include "wmcodec.h"
#include "audiohw.h" #include "audiohw.h"
#include "i2s.h"
const struct sound_settings_info audiohw_settings[] = { const struct sound_settings_info audiohw_settings[] = {
[SOUND_VOLUME] = {"dB", 0, 1, -74, 6, -25}, [SOUND_VOLUME] = {"dB", 0, 1, -74, 6, -25},
@ -129,8 +128,6 @@ void audiohw_mute(bool mute)
void audiohw_preinit(void) void audiohw_preinit(void)
{ {
i2s_reset();
/* POWER UP SEQUENCE */ /* POWER UP SEQUENCE */
wmcodec_write(RESET, RESET_RESET); wmcodec_write(RESET, RESET_RESET);

75
firmware/drivers/audio/wm8985.c
View file

@ -23,7 +23,6 @@
#include "wmcodec.h" #include "wmcodec.h"
#include "audiohw.h" #include "audiohw.h"
#include "i2s.h"
/* Register addresses as per datasheet Rev.4.4 */ /* Register addresses as per datasheet Rev.4.4 */
#define RESET 0x00 #define RESET 0x00
@ -127,57 +126,50 @@ int tenthdb2master(int db)
} }
/* Silently enable / disable audio output */ /* Silently enable / disable audio output */
void audiohw_enable_output(bool enable) void audiohw_preinit(void)
{ {
if (enable) wmcodec_write(RESET, 0x1ff); /* Reset */
{
/* TODO: reset the I2S controller into known state */
//i2s_reset();
wmcodec_write(RESET, 0x1ff); /* Reset */ wmcodec_write(BIASCTL, 0x100); /* BIASCUT = 1 */
wmcodec_write(OUTCTRL, 0x6); /* Thermal shutdown */
wmcodec_write(BIASCTL, 0x100); /* BIASCUT = 1 */ wmcodec_write(PWRMGMT1, 0x8); /* BIASEN = 1 */
wmcodec_write(OUTCTRL, 0x6); /* Thermal shutdown */
wmcodec_write(PWRMGMT1, 0x8); /* BIASEN = 1 */ /* Volume zero, mute all outputs */
wmcodec_write(LOUT1VOL, 0x140);
wmcodec_write(ROUT1VOL, 0x140);
wmcodec_write(LOUT2VOL, 0x140);
wmcodec_write(ROUT2VOL, 0x140);
wmcodec_write(OUT3MIX, 0x40);
wmcodec_write(OUT4MIX, 0x40);
/* Volume zero, mute all outputs */ /* DAC softmute, automute, 128OSR */
wmcodec_write(LOUT1VOL, 0x140); wmcodec_write(DACCTRL, 0x4c);
wmcodec_write(ROUT1VOL, 0x140);
wmcodec_write(LOUT2VOL, 0x140);
wmcodec_write(ROUT2VOL, 0x140);
wmcodec_write(OUT3MIX, 0x40);
wmcodec_write(OUT4MIX, 0x40);
/* DAC softmute, automute, 128OSR */
wmcodec_write(DACCTRL, 0x4c);
wmcodec_write(OUT4ADC, 0x2); /* POBCTRL = 1 */ wmcodec_write(OUT4ADC, 0x2); /* POBCTRL = 1 */
/* Enable output, DAC and mixer */ /* Enable output, DAC and mixer */
wmcodec_write(PWRMGMT3, 0x6f); wmcodec_write(PWRMGMT3, 0x6f);
wmcodec_write(PWRMGMT2, 0x180); wmcodec_write(PWRMGMT2, 0x180);
wmcodec_write(PWRMGMT1, 0xd); wmcodec_write(PWRMGMT1, 0xd);
wmcodec_write(LOUTMIX, 0x1); wmcodec_write(LOUTMIX, 0x1);
wmcodec_write(ROUTMIX, 0x1); wmcodec_write(ROUTMIX, 0x1);
/* Disable clock since we're acting as slave to the SoC */ /* Disable clock since we're acting as slave to the SoC */
wmcodec_write(CLKGEN, 0x0); wmcodec_write(CLKGEN, 0x0);
wmcodec_write(AINTFCE, 0x10); /* 16-bit, I2S format */ wmcodec_write(AINTFCE, 0x10); /* 16-bit, I2S format */
wmcodec_write(LDACVOL, 0x1ff); /* Full DAC digital vol */ wmcodec_write(LDACVOL, 0x1ff); /* Full DAC digital vol */
wmcodec_write(RDACVOL, 0x1ff); wmcodec_write(RDACVOL, 0x1ff);
wmcodec_write(OUT4ADC, 0x0); /* POBCTRL = 0 */ wmcodec_write(OUT4ADC, 0x0); /* POBCTRL = 0 */
}
sleep(HZ/2); void audiohw_postinit(void)
{
sleep(HZ/2);
audiohw_mute(0); audiohw_mute(0);
}
else
{
audiohw_mute(1);
}
} }
void audiohw_set_headphone_vol(int vol_l, int vol_r) void audiohw_set_headphone_vol(int vol_l, int vol_r)
@ -256,9 +248,6 @@ void audiohw_enable_recording(bool source_mic)
{ {
(void)source_mic; /* We only have a line-in (I think) */ (void)source_mic; /* We only have a line-in (I think) */
/* TODO: reset the I2S controller into known state */
//i2s_reset();
wmcodec_write(RESET, 0x1ff); /*Reset*/ wmcodec_write(RESET, 0x1ff); /*Reset*/
wmcodec_write(PWRMGMT1, 0x2b); wmcodec_write(PWRMGMT1, 0x2b);

11
firmware/export/audiohw.h
View file

@ -150,12 +150,13 @@ extern const struct sound_settings_info audiohw_settings[];
*/ */
/** /**
* Initialize audio codec to a well defined state. * Initialize audio codec to a well defined state. Includes SoC-specific
* setup.
*/ */
void audiohw_init(void); void audiohw_init(void);
/** /**
* Do initial audio codec setup. * Do initial audio codec setup. Usually called from audiohw_init.
*/ */
void audiohw_preinit(void); void audiohw_preinit(void);
@ -207,12 +208,6 @@ void audiohw_set_balance(int val);
*/ */
void audiohw_mute(bool mute); void audiohw_mute(bool mute);
/**
* Silently en/disable audio output.
* @param enable true or false.
*/
void audiohw_enable_output(bool enable);
#ifdef AUDIOHW_HAVE_TREBLE #ifdef AUDIOHW_HAVE_TREBLE
/** /**
* Set new treble value. * Set new treble value.

8
firmware/target/arm/pcm-pp.c
View file

@ -373,14 +373,6 @@ void pcm_play_dma_init(void)
/* Initialize default register values. */ /* Initialize default register values. */
audiohw_init(); audiohw_init();
#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) && !defined(HAVE_WM8975) \
&& !defined(HAVE_WM8758) && !defined(HAVE_AS3514)
/* Power on */
audiohw_enable_output(true);
/* Unmute the master channel (DAC should be at zero point now). */
audiohw_mute(false);
#endif
dma_play_data.size = 0; dma_play_data.size = 0;
#if NUM_CORES > 1 #if NUM_CORES > 1
dma_play_data.core = 0; /* no core in control */ dma_play_data.core = 0; /* no core in control */

13
firmware/target/arm/pcm-telechips.c
View file

@ -108,19 +108,18 @@ void pcm_play_dma_init(void)
/* Initialize default register values. */ /* Initialize default register values. */
audiohw_init(); audiohw_init();
/* Power on */
audiohw_enable_output(true);
/* Unmute the master channel (DAC should be at zero point now). */
audiohw_mute(false);
dma_play_data.size = 0; dma_play_data.size = 0;
#if NUM_CORES > 1 #if NUM_CORES > 1
dma_play_data.core = 0; /* no core in control */ dma_play_data.core = 0; /* no core in control */
#endif #endif
} }
void pcm_postinit(void)
{
audiohw_postinit();
}
void pcm_apply_settings(void) void pcm_apply_settings(void)
{ {
pcm_curr_sampr = pcm_freq; pcm_curr_sampr = pcm_freq;

5
firmware/target/arm/tcc77x/iaudio7/audio-iaudio7.c
View file

@ -26,11 +26,6 @@
int audio_channels = 2; int audio_channels = 2;
int audio_output_source = AUDIO_SRC_PLAYBACK; int audio_output_source = AUDIO_SRC_PLAYBACK;
void audiohw_enable_output(bool on)
{
(void) on;
}
void audio_set_output_source(int source) void audio_set_output_source(int source)
{ {
int oldmode = set_fiq_status(FIQ_DISABLED); int oldmode = set_fiq_status(FIQ_DISABLED);

5
firmware/target/arm/tcc77x/logikdax/audio-logikdax.c
View file

@ -26,11 +26,6 @@
int audio_channels = 2; int audio_channels = 2;
int audio_output_source = AUDIO_SRC_PLAYBACK; int audio_output_source = AUDIO_SRC_PLAYBACK;
void audiohw_enable_output(bool on)
{
(void)on;
}
void audio_set_output_source(int source) void audio_set_output_source(int source)
{ {
(void)source; (void)source;

5
firmware/target/arm/tcc77x/m200/audio-m200.c
View file

@ -26,11 +26,6 @@
int audio_channels = 2; int audio_channels = 2;
int audio_output_source = AUDIO_SRC_PLAYBACK; int audio_output_source = AUDIO_SRC_PLAYBACK;
void audiohw_enable_output(bool on)
{
(void)on;
}
void audio_set_output_source(int source) void audio_set_output_source(int source)
{ {
(void)source; (void)source;

20
firmware/target/arm/wmcodec-pp.c
View file

@ -29,6 +29,7 @@
#include "system.h" #include "system.h"
#include "audiohw.h" #include "audiohw.h"
#include "i2c-pp.h" #include "i2c-pp.h"
#include "i2s.h"
#include "wmcodec.h" #include "wmcodec.h"
#if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) || defined(MROBE_100) #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) || defined(MROBE_100)
@ -43,7 +44,8 @@
/* /*
* Initialise the PP I2C and I2S. * Initialise the PP I2C and I2S.
*/ */
void audiohw_init(void) { void audiohw_init(void)
{
#ifdef CPU_PP502x #ifdef CPU_PP502x
/* normal outputs for CDI and I2S pin groups */ /* normal outputs for CDI and I2S pin groups */
DEV_INIT2 &= ~0x300; DEV_INIT2 &= ~0x300;
@ -95,20 +97,12 @@ void audiohw_init(void) {
outl(inl(0xcf000028) & ~0x8, 0xcf000028); outl(inl(0xcf000028) & ~0x8, 0xcf000028);
#endif /* IPOD_1G2G/3G */ #endif /* IPOD_1G2G/3G */
#endif #endif
#if defined(HAVE_WM8731) || defined(HAVE_WM8751) || defined(HAVE_WM8975) \
|| defined(HAVE_WM8758)
audiohw_preinit();
#endif
}
#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) && !defined(HAVE_WM8975) \ /* reset the I2S controller into known state */
&& !defined(HAVE_WM8758) i2s_reset();
void audiohw_postinit(void)
{ audiohw_preinit();
} }
#endif
void wmcodec_write(int reg, int data) void wmcodec_write(int reg, int data)
{ {

9
firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
View file

@ -50,12 +50,11 @@ void pcm_play_dma_init(void)
/* Initialize default register values. */ /* Initialize default register values. */
audiohw_init(); audiohw_init();
}
/* Power on */ void pcm_postinit(void)
audiohw_enable_output(true); {
audiohw_postinit();
/* Unmute the master channel (DAC should be at zero point now). */
audiohw_mute(false);
} }
void pcm_apply_settings(void) void pcm_apply_settings(void)