len0rd/rockbox
1
0
Fork 1
mirror of https://github.com/Rockbox/rockbox.git synced 2025-12-10 05:35:20 -05:00
Code Issues Projects Releases Packages Wiki Activity Actions

imx233/fuze+: add pin irq support

Browse source 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30195 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Amaury Pouly 2011-07-22 15:45:50 +00:00
parent 7d1d4c6f07
commit 85c32dbd12
3 changed files with 85 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

3
firmware/SOURCES
View file

@ -501,6 +501,7 @@ target/arm/imx233/mmc-imx233.c
target/arm/imx233/ssp-imx233.c
target/arm/imx233/usb-imx233.c
target/arm/imx233/dma-imx233.c
target/arm/imx233/pinctrl-imx233.c
#endif /* IMX233 */
#if CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2
@ -1453,11 +1454,9 @@ target/arm/as3525/lcd-as-e200v2-fuze-fuzev2.S
#ifdef SANSA_FUZEPLUS
#ifndef SIMULATOR
#ifndef BOOTLOADER
drivers/synaptics-rmi.c
drivers/generic_i2c.c
target/arm/imx233/sansa-fuzeplus/fmradio-i2c-fuzeplus.c
#endif
target/arm/imx233/sansa-fuzeplus/backlight-fuzeplus.c
target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c

77
firmware/target/arm/imx233/pinctrl-imx233.c Normal file
View file

@ -0,0 +1,77 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2011 by Amaury Pouly
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "system.h"
#include "system-target.h"
#include "cpu.h"
#include "pinctrl-imx233.h"
static pin_irq_cb_t pin_cb[3][32]; /* 3 banks, 32 pins/bank */
static void INT_GPIO(int bank)
{
uint32_t fire = HW_PINCTRL_IRQSTAT(bank) & HW_PINCTRL_IRQEN(bank);
for(int pin = 0; pin < 32; pin++)
if(fire & (1 << pin))
{
pin_irq_cb_t cb = pin_cb[bank][pin];
imx233_setup_pin_irq(bank, pin, false, false, false, NULL);
if(cb)
cb(bank, pin);
}
}
void INT_GPIO0(void)
{
INT_GPIO(0);
}
void INT_GPIO1(void)
{
INT_GPIO(1);
}
void INT_GPIO2(void)
{
INT_GPIO(2);
}
void imx233_setup_pin_irq(int bank, int pin, bool enable_int,
bool level, bool polarity, pin_irq_cb_t cb)
{
__REG_CLR(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin;
__REG_CLR(HW_PINCTRL_IRQEN(bank)) = 1 << pin;
__REG_CLR(HW_PINCTRL_IRQSTAT(bank))= 1 << pin;
pin_cb[bank][pin] = cb;
if(enable_int)
{
if(level)
__REG_SET(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin;
else
__REG_CLR(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin;
if(polarity)
__REG_SET(HW_PINCTRL_IRQPOL(bank)) = 1 << pin;
else
__REG_CLR(HW_PINCTRL_IRQPOL(bank)) = 1 << pin;
__REG_SET(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin;
__REG_SET(HW_PINCTRL_IRQEN(bank)) = 1 << pin;
imx233_enable_interrupt(INT_SRC_GPIO(bank), true);
}
}

7
firmware/target/arm/imx233/pinctrl-imx233.h
View file

@ -51,6 +51,8 @@
#define PINCTRL_DRIVE_12mA 2
#define PINCTRL_DRIVE_16mA 3 /* not available on all pins */
typedef void (*pin_irq_cb_t)(int bank, int pin);
static inline void imx233_pinctrl_init(void)
{
__REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_CLKGATE | __BLOCK_SFTRST;
@ -121,4 +123,9 @@ static inline void imx233_enable_pin_pullup_mask(unsigned bank, uint32_t pin_msk
__REG_CLR(HW_PINCTRL_PULL(bank)) = pin_msk;
}
/** On irq, the pin irq interrupt is disable and then cb is called;
* the setup_pin_irq function needs to be called again to enable it again */
void imx233_setup_pin_irq(int bank, int pin, bool enable_int,
bool level, bool polarity, pin_irq_cb_t cb);
#endif /* __PINCTRL_IMX233_H__ */