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Gigabeat: Replace generic i2c driver with one that uses the CPU's builtin controller. Add some clocking registers to 'View I/O ports'.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13720 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis
parent
13de6583ac
commit
7fb0f71668
5 changed files with 114 additions and 97 deletions
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@ -7,7 +7,7 @@
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Linus Nielsen Feltzing
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* Copyright (C) 2007 by Michael Sevakis
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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@ -16,119 +16,110 @@
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include <stdbool.h>
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#include "kernel.h"
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#include "system.h"
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#include "logf.h"
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#include "debug.h"
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#include "string.h"
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#include "generic_i2c.h"
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#include "i2c-meg-fx.h"
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static void i2c_sda_output(void)
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/* Only implements sending bytes for now. Adding receiving bytes should be
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straightforward if needed. No yielding is present since the calls only
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involve setting audio codec registers - a very rare event. */
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/* Wait for a condition on the bus, optionally returning it */
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#define COND_RET _c;
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#define COND_VOID
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#define WAIT_COND(cond, ret) \
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({ \
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int _t = current_tick + 2; \
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bool _c; \
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while (1) { \
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_c = !!(cond); \
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if (_c || TIME_AFTER(current_tick, _t)) \
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break; \
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} \
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ret \
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})
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static int i2c_getack(void)
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{
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GPECON |= (1 << 30);
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/* Wait for ACK: 0 = ack received, 1 = ack not received */
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WAIT_COND(IICCON & I2C_TXRX_INTPND, COND_VOID);
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return IICSTAT & I2C_ACK_L;
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}
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static void i2c_sda_input(void)
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static int i2c_start(void)
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{
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GPECON &= ~(3 << 30);
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/* Generate START */
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IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_START | I2C_RXTX_ENB;
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return i2c_getack();
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}
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static void i2c_sda_lo(void)
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static void i2c_stop(void)
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{
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GPEDAT &= ~(1 << 15);
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/* Generate STOP */
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IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_RXTX_ENB;
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/* Clear pending interrupt to continue */
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IICCON &= ~I2C_TXRX_INTPND;
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}
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static void i2c_sda_hi(void)
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static int i2c_outb(unsigned char byte)
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{
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GPEDAT |= (1 << 15);
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/* Write byte to shift register */
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IICDS = byte;
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/* Clear pending interrupt to continue */
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IICCON &= ~I2C_TXRX_INTPND;
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return i2c_getack();
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}
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static int i2c_sda(void)
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void i2c_write(int addr, const unsigned char *buf, int count)
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{
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return GPEDAT & (1 << 15);
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}
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/* Turn on I2C clock */
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CLKCON |= (1 << 16);
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static void i2c_scl_output(void)
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{
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GPECON |= (1 << 28);
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}
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/* Set mode to master transmitter and enable lines */
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IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_RXTX_ENB;
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static void i2c_scl_input(void)
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{
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GPECON &= ~(3 << 28);
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}
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static void i2c_scl_lo(void)
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{
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GPEDAT &= ~(1 << 14);
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}
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static int i2c_scl(void)
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{
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return GPEDAT & (1 << 14);
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}
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static void i2c_scl_hi(void)
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{
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i2c_scl_input();
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while(!i2c_scl());
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GPEDAT |= (1 << 14);
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i2c_scl_output();
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}
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static void i2c_delay(void)
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{
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unsigned _x;
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/* The i2c can clock at 500KHz: 2uS period -> 1uS half period */
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/* about 30 cycles overhead + X * 7 */
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/* 300MHz: 1000nS @3.36nS/cyc = 297cyc: X = 38*/
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/* 100MHz: 1000nS @10nS/cyc = 100cyc : X = 10 */
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for (_x = 38; _x; _x--)
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/* Wait for bus to be available */
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if (WAIT_COND(!(IICSTAT & I2C_BUSY), COND_RET))
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{
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/* burn CPU cycles */
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/* gcc makes it an inc loop - check with objdump for asm timing */
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/* Send slave address and then data */
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IICCON &= ~I2C_TXRX_INTPND;
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IICCON |= I2C_TXRX_INTENB;
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IICDS = addr & 0xfe;
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if (i2c_start() == 0)
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while (count-- > 0 && i2c_outb(*buf++) == 0);
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i2c_stop();
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IICCON &= ~I2C_TXRX_INTENB;
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}
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/* Go back to slave receive mode and disable lines */
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IICSTAT = 0;
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/* Turn off I2C clock */
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CLKCON &= ~(1 << 16);
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}
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struct i2c_interface s3c2440_i2c = {
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0x34, /* Address */
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/* Bit-banged interface definitions */
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i2c_scl_hi, /* Drive SCL high, might sleep on clk stretch */
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i2c_scl_lo, /* Drive SCL low */
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i2c_sda_hi, /* Drive SDA high */
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i2c_sda_lo, /* Drive SDA low */
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i2c_sda_input, /* Set SDA as input */
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i2c_sda_output, /* Set SDA as output */
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i2c_scl_input, /* Set SCL as input */
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i2c_scl_output, /* Set SCL as output */
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i2c_scl, /* Read SCL, returns 0 or nonzero */
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i2c_sda, /* Read SDA, returns 0 or nonzero */
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i2c_delay, /* START SDA hold time (tHD:SDA) */
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i2c_delay, /* SDA hold time (tHD:DAT) */
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i2c_delay, /* SDA setup time (tSU:DAT) */
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i2c_delay, /* STOP setup time (tSU:STO) */
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i2c_delay, /* Rep. START setup time (tSU:STA) */
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i2c_delay, /* SCL high period (tHIGH) */
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};
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void i2c_init(void)
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{
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/* Set GPE15 (SDA) and GPE14 (SCL) to 1 */
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GPECON = (GPECON & ~(0xF<<28)) | 5<<28;
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i2c_add_node(&s3c2440_i2c);
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}
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/* We poll I2C interrupts */
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INTMSK |= (1 << 27);
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void i2c_send(int bus_address, int reg_address, const unsigned char buf)
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{
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i2c_write_data(bus_address, reg_address, &buf, 1);
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/* Turn on I2C clock */
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CLKCON |= (1 << 16);
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/* Set GPE15 (IICSDA) and GPE14 (IICSCL) to IIC */
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GPECON = (GPECON & ~((3 << 30) | (3 << 28))) |
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((2 << 30) | (2 << 28));
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/* Bus ACK, IICCLK: fPCLK / 16, Rx/Tx Int: Disable, Tx clock: IICCLK/8 */
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/* OF PCLK: 49.1568MHz / 16 / 8 = 384.0375 kHz */
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IICCON = (7 << 0);
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/* SDA line delayed 0 PCLKs */
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IICLC = (0 << 0);
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/* Turn off I2C clock */
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CLKCON &= ~(1 << 16);
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}
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@ -7,7 +7,7 @@
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Linus Nielsen Feltzing
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* Copyright (C) 2007 by Michael Sevakis
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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@ -19,4 +19,26 @@
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/* chip-specific i2c functions */
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void i2c_send(int bus_address, int reg_address, const unsigned char buf);
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/* IICCON */
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#define I2C_ACKGEN (1 << 7)
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#define I2C_TXCLK_512 (1 << 6)
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#define I2C_TXRX_INTENB (1 << 5)
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#define I2C_TXRX_INTPND (1 << 4)
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/* IICSTAT */
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#define I2C_MODE_MASTER (2 << 6)
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#define I2C_MODE_TX (1 << 6)
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#define I2C_BUSY (1 << 5)
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#define I2C_START (1 << 5)
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#define I2C_RXTX_ENB (1 << 4)
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#define I2C_BUS_ARB_FAILED (1 << 3)
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#define I2C_S_ADDR_STAT (1 << 2)
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#define I2C_S_ADDR_MATCH (1 << 1)
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#define I2C_ACK_L (1 << 0)
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/* IICLC */
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#define I2C_FLT_ENB (1 << 2)
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void i2c_init(void);
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void i2c_write(int addr, const unsigned char *data, int count);
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@ -26,7 +26,6 @@
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#include "cpu.h"
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#include "kernel.h"
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#include "sound.h"
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#include "i2c.h"
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#include "i2c-meg-fx.h"
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void audiohw_init(void)
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@ -44,5 +43,8 @@ void audiohw_init(void)
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void wmcodec_write(int reg, int data)
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{
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i2c_send(0x34, (reg<<1) | ((data&0x100)>>8), data&0xff);
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unsigned char d[2];
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d[0] = (reg << 1) | ((data & 0x100) >> 8);
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d[1] = data;
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i2c_write(0x34, d, 2);
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}
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