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Sansa AMS: Use some new macros to set the MCICLK frequency to help avoid missing the bypass bit when resetting frequencies with MCI_CLOCK register.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23831 a1c6a512-1295-4272-9138-f99709370657
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40629be046
commit
7f88cc44aa
1 changed files with 10 additions and 5 deletions
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@ -248,6 +248,11 @@ static bool send_cmd(const int drive, const int cmd, const int arg,
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return false;
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}
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#define MCI_FULLSPEED (MCI_CLOCK_ENABLE | MCI_CLOCK_BYPASS) /* MCLK */
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#define MCI_HALFSPEED (MCI_CLOCK_ENABLE) /* MCLK/2 */
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#define MCI_QUARTERSPEED (MCI_CLOCK_ENABLE | 1) /* MCLK/4 */
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#define MCI_IDENTSPEED (MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV) /* IDENT */
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static int sd_init_card(const int drive)
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{
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unsigned long response;
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@ -258,7 +263,7 @@ static int sd_init_card(const int drive)
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/* MCLCK on and set to 400kHz ident frequency */
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MCI_CLOCK(drive) = MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV;
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MCI_CLOCK(drive) = MCI_IDENTSPEED;
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/* 100 - 400kHz clock required for Identification Mode */
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/* Start of Card Identification Mode ************************************/
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@ -307,11 +312,11 @@ static int sd_init_card(const int drive)
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/* End of Card Identification Mode ************************************/
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/* full speed for controller clock MCICLK = MCLK = PCLK = 62 MHz */
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MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* FIXME: 50 MHz is spec limit */
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mci_delay();
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/* Boost MCICLK to operating speed */ /* FIXME: 50 MHz is spec limit */
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MCI_CLOCK(drive) = (sd_v2 ? MCI_FULLSPEED : MCI_FULLSPEED);
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#ifdef HAVE_MULTIDRIVE /* The internal SDs are v1 */
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#ifdef HAVE_MULTIDRIVE
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/* Try to switch V2 cards to HS timings, non HS seem to ignore this */
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if(sd_v2)
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{
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