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https://github.com/Rockbox/rockbox.git
synced 2025-11-09 21:22:39 -05:00
imx233: add regulator api
Remove the old debug stuff about VDDx and add a clean api to get/set the regulator (VDDD, VDDA, VDDIO, VDDMEM). This is useful for proper frequency scaling. Change-Id: Ia5a1a712fd66652a8ad9601ed00db31aba5a7561
This commit is contained in:
Amaury Pouly
parent
51f63f0b2a
commit
7ee1e30609
3 changed files with 184 additions and 56 deletions
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@ -34,6 +34,7 @@
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#include "pinctrl-imx233.h"
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#include "ocotp-imx233.h"
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#include "string.h"
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#include "stdio.h"
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#define DEBUG_CANCEL BUTTON_BACK
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@ -150,21 +151,33 @@ bool dbg_hw_info_power(void)
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lcd_clear_display();
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struct imx233_power_info_t info = imx233_power_get_info(POWER_INFO_ALL);
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lcd_putsf(0, 0, "VDDD: %d mV linreg: %d offset: %d", info.vddd, info.vddd_linreg,
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info.vddd_linreg_offset);
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lcd_putsf(0, 1, "VDDA: %d mV linreg: %d offset: %d", info.vdda, info.vdda_linreg,
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info.vdda_linreg_offset);
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lcd_putsf(0, 2, "VDDIO: %d mV offset: %d", info.vddio, info.vddio_linreg_offset);
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lcd_putsf(0, 3, "VDDMEM: %d mV linreg: %d", info.vddmem, info.vddmem_linreg);
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lcd_putsf(0, 4, "DC-DC: pll: %d freq: %d", info.dcdc_sel_pllclk, info.dcdc_freqsel);
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lcd_putsf(0, 5, "charge: %d mA stop: %d mA", info.charge_current, info.stop_current);
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lcd_putsf(0, 6, "charging: %d bat_adj: %d", info.charging, info.batt_adj);
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lcd_putsf(0, 7, "4.2: en: %d dcdc: %d", info._4p2_enable, info._4p2_dcdc);
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lcd_putsf(0, 8, "4.2: cmptrip: %d dropout: %d", info._4p2_cmptrip, info._4p2_dropout);
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lcd_putsf(0, 9, "5V: pwd_4.2_charge: %d", info._5v_pwd_charge_4p2);
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lcd_putsf(0, 10, "5V: chargelim: %d mA", info._5v_charge_4p2_limit);
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lcd_putsf(0, 11, "5V: dcdc: %d xfer: %d", info._5v_enable_dcdc, info._5v_dcdc_xfer);
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lcd_putsf(0, 12, "5V: thr: %d mV use: %d cmps: %d", info._5v_vbusvalid_thr,
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int line = 0;
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unsigned trg, bo;
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bool en;
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int linreg;
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char buf[16];
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lcd_putsf(0, line++, "name value bo linreg");
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#define DISP_REGULATOR(name) \
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imx233_power_get_regulator(REGULATOR_##name, &trg, &bo); \
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imx233_power_get_regulator_linreg(REGULATOR_##name, &en, &linreg); \
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if(en) snprintf(buf, sizeof(buf), "%d", linreg); \
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else snprintf(buf, sizeof(buf), " "); \
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lcd_putsf(0, line++, "%6s %4d %4d %s", #name, trg, bo, buf); \
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DISP_REGULATOR(VDDD);
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DISP_REGULATOR(VDDA);
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DISP_REGULATOR(VDDIO);
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DISP_REGULATOR(VDDMEM);
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lcd_putsf(0, line++, "DC-DC: pll: %d freq: %d", info.dcdc_sel_pllclk, info.dcdc_freqsel);
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lcd_putsf(0, line++, "charge: %d mA stop: %d mA", info.charge_current, info.stop_current);
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lcd_putsf(0, line++, "charging: %d bat_adj: %d", info.charging, info.batt_adj);
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lcd_putsf(0, line++, "4.2: en: %d dcdc: %d", info._4p2_enable, info._4p2_dcdc);
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lcd_putsf(0, line++, "4.2: cmptrip: %d dropout: %d", info._4p2_cmptrip, info._4p2_dropout);
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lcd_putsf(0, line++, "5V: pwd_4.2_charge: %d", info._5v_pwd_charge_4p2);
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lcd_putsf(0, line++, "5V: chargelim: %d mA", info._5v_charge_4p2_limit);
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lcd_putsf(0, line++, "5V: dcdc: %d xfer: %d", info._5v_enable_dcdc, info._5v_dcdc_xfer);
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lcd_putsf(0, line++, "5V: thr: %d mV use: %d cmps: %d", info._5v_vbusvalid_thr,
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info._5v_vbusvalid_detect, info._5v_vbus_cmps);
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lcd_update();
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@ -286,7 +299,8 @@ bool dbg_hw_info_clkctrl(void)
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#undef c
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}
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int line = ARRAYLEN(dbg_clk) + 1;
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lcd_putsf(0, line, "auto slow: %d", imx233_clkctrl_is_auto_slow_enabled());
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lcd_putsf(0, line, "auto slow: %d emi sync: %d", imx233_clkctrl_is_auto_slow_enabled(),
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imx233_clkctrl_is_emi_sync_enabled());
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line++;
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lcd_putsf(0, line, "as monitor: ");
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int x_off = 12;
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@ -165,6 +165,130 @@ void imx233_power_set_stop_current(unsigned current)
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}
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}
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/* regulator info */
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#define HAS_BO (1 << 0)
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#define HAS_LINREG (1 << 1)
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#define HAS_LINREG_OFFSET (1 << 2)
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static struct
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{
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unsigned min, step;
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volatile uint32_t *reg;
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uint32_t trg_bm, trg_bp; // bitmask and bitpos
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unsigned flags;
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uint32_t bo_bm, bo_bp; // bitmask and bitpos
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uint32_t linreg_bm;
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uint32_t linreg_offset_bm, linreg_offset_bp; // bitmask and bitpos
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} regulator_info[] =
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{
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#define ADD_REGULATOR(name, mask) \
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.min = HW_POWER_##name##CTRL__TRG_MIN, \
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.step = HW_POWER_##name##CTRL__TRG_STEP, \
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.reg = &HW_POWER_##name##CTRL, \
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.trg_bm = HW_POWER_##name##CTRL__TRG_BM, \
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.trg_bp = HW_POWER_##name##CTRL__TRG_BP, \
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.flags = mask
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#define ADD_REGULATOR_BO(name) \
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.bo_bm = HW_POWER_##name##CTRL__BO_OFFSET_BM, \
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.bo_bp = HW_POWER_##name##CTRL__BO_OFFSET_BP
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#define ADD_REGULATOR_LINREG(name) \
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.linreg_bm = HW_POWER_##name##CTRL__ENABLE_LINREG
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#define ADD_REGULATOR_LINREG_OFFSET(name) \
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.linreg_offset_bm = HW_POWER_##name##CTRL__LINREG_OFFSET_BM, \
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.linreg_offset_bp = HW_POWER_##name##CTRL__LINREG_OFFSET_BP
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[REGULATOR_VDDD] =
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{
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ADD_REGULATOR(VDDD, HAS_BO|HAS_LINREG|HAS_LINREG_OFFSET),
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ADD_REGULATOR_BO(VDDD),
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ADD_REGULATOR_LINREG(VDDD),
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ADD_REGULATOR_LINREG_OFFSET(VDDD)
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},
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[REGULATOR_VDDA] =
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{
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ADD_REGULATOR(VDDA, HAS_BO|HAS_LINREG|HAS_LINREG_OFFSET),
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ADD_REGULATOR_BO(VDDA),
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ADD_REGULATOR_LINREG(VDDA),
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ADD_REGULATOR_LINREG_OFFSET(VDDA)
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},
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[REGULATOR_VDDIO] =
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{
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ADD_REGULATOR(VDDIO, HAS_BO|HAS_LINREG_OFFSET),
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ADD_REGULATOR_BO(VDDIO),
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ADD_REGULATOR_LINREG_OFFSET(VDDIO)
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},
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[REGULATOR_VDDMEM] =
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{
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ADD_REGULATOR(VDDMEM, HAS_LINREG),
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ADD_REGULATOR_LINREG(VDDMEM),
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},
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};
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void imx233_power_get_regulator(enum imx233_regulator_t reg, unsigned *value_mv,
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unsigned *brownout_mv)
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{
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uint32_t reg_val = *regulator_info[reg].reg;
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/* read target value */
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unsigned raw_val = (reg_val & regulator_info[reg].trg_bm) >> regulator_info[reg].trg_bp;
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/* convert it to mv */
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if(value_mv)
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*value_mv = regulator_info[reg].min + regulator_info[reg].step * raw_val;
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if(regulator_info[reg].flags & HAS_BO)
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{
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/* read brownout offset */
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unsigned raw_bo = (reg_val & regulator_info[reg].bo_bm) >> regulator_info[reg].bo_bp;
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/* convert it to mv */
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if(brownout_mv)
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*brownout_mv = regulator_info[reg].min + regulator_info[reg].step * (raw_val - raw_bo);
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}
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else if(brownout_mv)
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*brownout_mv = 0;
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}
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void imx233_power_set_regulator(enum imx233_regulator_t reg, unsigned value_mv,
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unsigned brownout_mv)
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{
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// compute raw values
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unsigned raw_val = (value_mv - regulator_info[reg].min) / regulator_info[reg].step;
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unsigned raw_bo_offset = (value_mv - brownout_mv) / regulator_info[reg].step;
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// update
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uint32_t reg_val = (*regulator_info[reg].reg) & ~regulator_info[reg].trg_bm;
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reg_val |= raw_val << regulator_info[reg].trg_bp;
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if(regulator_info[reg].flags & HAS_BO)
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{
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reg_val &= ~regulator_info[reg].bo_bm;
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reg_val |= raw_bo_offset << regulator_info[reg].bo_bp;
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}
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*regulator_info[reg].reg = reg_val;
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}
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// offset is -1,0 or 1
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void imx233_power_get_regulator_linreg(enum imx233_regulator_t reg,
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bool *enabled, int *linreg_offset)
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{
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if(enabled && regulator_info[reg].flags & HAS_LINREG)
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*enabled = !!(*regulator_info[reg].reg & regulator_info[reg].linreg_bm);
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else if(enabled)
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*enabled = true;
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if(regulator_info[reg].flags & HAS_LINREG_OFFSET)
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{
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unsigned v = (*regulator_info[reg].reg & regulator_info[reg].linreg_offset_bm);
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v >>= regulator_info[reg].linreg_offset_bp;
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if(linreg_offset)
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*linreg_offset = (v == 0) ? 0 : (v == 1) ? 1 : -1;
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}
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else if(linreg_offset)
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*linreg_offset = 0;
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}
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// offset is -1,0 or 1
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/*
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void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg,
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bool enabled, int linreg_offset)
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{
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}
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*/
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struct imx233_power_info_t imx233_power_get_info(unsigned flags)
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{
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static int dcdc_freqsel[8] = {
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@ -180,31 +304,6 @@ struct imx233_power_info_t imx233_power_get_info(unsigned flags)
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struct imx233_power_info_t s;
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memset(&s, 0, sizeof(s));
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if(flags & POWER_INFO_VDDD)
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{
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s.vddd = HW_POWER_VDDDCTRL__TRG_MIN + HW_POWER_VDDDCTRL__TRG_STEP * __XTRACT(HW_POWER_VDDDCTRL, TRG);
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s.vddd_linreg = HW_POWER_VDDDCTRL & HW_POWER_VDDDCTRL__ENABLE_LINREG;
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s.vddd_linreg_offset = __XTRACT(HW_POWER_VDDDCTRL, LINREG_OFFSET) == 0 ? 0 :
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__XTRACT(HW_POWER_VDDDCTRL, LINREG_OFFSET) == 1 ? 25 : -25;
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}
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if(flags & POWER_INFO_VDDA)
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{
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s.vdda = HW_POWER_VDDACTRL__TRG_MIN + HW_POWER_VDDACTRL__TRG_STEP * __XTRACT(HW_POWER_VDDACTRL, TRG);
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s.vdda_linreg = HW_POWER_VDDACTRL & HW_POWER_VDDACTRL__ENABLE_LINREG;
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s.vdda_linreg_offset = __XTRACT(HW_POWER_VDDACTRL, LINREG_OFFSET) == 0 ? 0 :
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__XTRACT(HW_POWER_VDDACTRL, LINREG_OFFSET) == 1 ? 25 : -25;
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}
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if(flags & POWER_INFO_VDDIO)
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{
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s.vddio = HW_POWER_VDDIOCTRL__TRG_MIN + HW_POWER_VDDIOCTRL__TRG_STEP * __XTRACT(HW_POWER_VDDIOCTRL, TRG);
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s.vddio_linreg_offset = __XTRACT(HW_POWER_VDDIOCTRL, LINREG_OFFSET) == 0 ? 0 :
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__XTRACT(HW_POWER_VDDIOCTRL, LINREG_OFFSET) == 1 ? 25 : -25;
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}
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if(flags & POWER_INFO_VDDMEM)
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{
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s.vddmem = HW_POWER_VDDMEMCTRL__TRG_MIN + HW_POWER_VDDMEMCTRL__TRG_STEP * __XTRACT(HW_POWER_VDDMEMCTRL, TRG);
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s.vddmem_linreg = HW_POWER_VDDMEMCTRL & HW_POWER_VDDMEMCTRL__ENABLE_LINREG;
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}
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if(flags & POWER_INFO_DCDC)
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{
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s.dcdc_sel_pllclk = HW_POWER_MISC & HW_POWER_MISC__SEL_PLLCLK;
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@ -77,6 +77,8 @@
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#define HW_POWER_VDDDCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x40))
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#define HW_POWER_VDDDCTRL__TRG_BP 0
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#define HW_POWER_VDDDCTRL__TRG_BM 0x1f
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#define HW_POWER_VDDDCTRL__BO_OFFSET_BP 8
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#define HW_POWER_VDDDCTRL__BO_OFFSET_BM (0x7 << 8)
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#define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */
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#define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */
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#define HW_POWER_VDDDCTRL__LINREG_OFFSET_BP 16
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@ -86,6 +88,8 @@
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#define HW_POWER_VDDACTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x50))
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#define HW_POWER_VDDACTRL__TRG_BP 0
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#define HW_POWER_VDDACTRL__TRG_BM 0x1f
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#define HW_POWER_VDDACTRL__BO_OFFSET_BP 8
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#define HW_POWER_VDDACTRL__BO_OFFSET_BM (0x7 << 8)
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#define HW_POWER_VDDACTRL__TRG_STEP 25 /* mV */
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#define HW_POWER_VDDACTRL__TRG_MIN 1500 /* mV */
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#define HW_POWER_VDDACTRL__LINREG_OFFSET_BP 12
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@ -95,6 +99,8 @@
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#define HW_POWER_VDDIOCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x60))
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#define HW_POWER_VDDIOCTRL__TRG_BP 0
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#define HW_POWER_VDDIOCTRL__TRG_BM 0x1f
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#define HW_POWER_VDDIOCTRL__BO_OFFSET_BP 8
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#define HW_POWER_VDDIOCTRL__BO_OFFSET_BM (0x7 << 8)
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#define HW_POWER_VDDIOCTRL__TRG_STEP 25 /* mV */
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#define HW_POWER_VDDIOCTRL__TRG_MIN 2800 /* mV */
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#define HW_POWER_VDDIOCTRL__LINREG_OFFSET_BP 12
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@ -173,10 +179,33 @@ void imx233_power_set_charge_current(unsigned current); /* in mA */
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void imx233_power_set_stop_current(unsigned current); /* in mA */
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void imx233_power_enable_batadj(bool enable);
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enum imx233_regulator_t
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{
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REGULATOR_VDDD, /* target, brownout, linreg, linreg offset */
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REGULATOR_VDDA, /* target, brownout, linreg, linreg offset */
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REGULATOR_VDDIO, /* target, brownout, linreg offset */
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REGULATOR_VDDMEM, /* target, linreg */
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REGULATOR_COUNT,
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};
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void imx233_power_get_regulator(enum imx233_regulator_t reg, unsigned *target_mv,
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unsigned *brownout_mv);
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void imx233_power_set_regulator(enum imx233_regulator_t reg, unsigned target_mv,
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unsigned brownout_mv);
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// offset is -1,0 or 1
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void imx233_power_get_regulator_linreg(enum imx233_regulator_t reg,
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bool *enabled, int *linreg_offset);
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// offset is -1,0 or 1
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void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg,
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bool enabled, int linreg_offset);
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static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq)
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{
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HW_POWER_MISC &= ~(HW_POWER_MISC__SEL_PLLCLK | HW_POWER_MISC__FREQSEL_BM);
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/* WARNING: HW_POWER_MISC does have a SET/CLR variant ! */
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/* WARNING: HW_POWER_MISC does not have a SET/CLR variant ! */
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if(pll)
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{
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HW_POWER_MISC |= freq << HW_POWER_MISC__FREQSEL_BP;
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@ -186,16 +215,6 @@ static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq)
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struct imx233_power_info_t
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{
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int vddd; /* in mV */
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bool vddd_linreg; /* VDDD source: linreg from VDDA or DC-DC */
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int vddd_linreg_offset;
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int vdda; /* in mV */
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bool vdda_linreg; /* VDDA source: linreg from VDDIO or DC-DC */
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int vdda_linreg_offset;
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int vddio; /* in mV */
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int vddio_linreg_offset;
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int vddmem; /* in mV */
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bool vddmem_linreg; /* VDDMEM source: linreg from VDDIO or off */
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bool dcdc_sel_pllclk; /* clock source of DC-DC: pll or 24MHz xtal */
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int dcdc_freqsel;
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int charge_current;
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@ -215,10 +234,6 @@ struct imx233_power_info_t
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bool _5v_vbus_cmps;
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};
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#define POWER_INFO_VDDD (1 << 0)
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#define POWER_INFO_VDDA (1 << 1)
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#define POWER_INFO_VDDIO (1 << 2)
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#define POWER_INFO_VDDMEM (1 << 3)
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#define POWER_INFO_DCDC (1 << 4)
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#define POWER_INFO_CHARGE (1 << 5)
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#define POWER_INFO_4P2 (1 << 6)
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