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synced 2025-12-09 13:15:18 -05:00
Ingenic targets:
* Get audio working (only noise atm) * Clean up some stuff in USB git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19329 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Maurus Cuelenaere
parent
c848d2dd99
commit
7ea9e31658
3 changed files with 48 additions and 45 deletions
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@ -32,50 +32,52 @@ static int IS_WRITE_PCM;
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static void i2s_codec_set_samplerate(unsigned short rate);
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static void i2s_codec_clear(void)
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static void i2s_codec_reset(void)
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{
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REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL |
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ICDC_CDCCR1_VRCGH | ICDC_CDCCR1_HPOV0 | ICDC_CDCCR1_PDHPM | ICDC_CDCCR1_PDHP |
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ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST);
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udelay(10);
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REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL |
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ICDC_CDCCR1_VRCGH | ICDC_CDCCR1_HPOV0 | ICDC_CDCCR1_PDHPM | ICDC_CDCCR1_PDHP );
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}
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static void i2s_codec_init(void)
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{
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__aic_enable();
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__aic_select_i2s();
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__i2s_internal_codec();
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__i2s_as_slave();
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__i2s_select_i2s();
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__aic_select_i2s();
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__i2s_set_oss_sample_size(16);
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__aic_disable_byteswap();
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__aic_disable_unsignadj();
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__aic_disable_mono2stereo();
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REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL |
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ICDC_CDCCR1_VRCGH | ICDC_CDCCR1_HPOV0 | ICDC_CDCCR1_PDHPM | ICDC_CDCCR1_PDHP |
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ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST); /* reset */
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udelay(10);
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REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL |
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ICDC_CDCCR1_VRCGH | ICDC_CDCCR1_HPOV0 | ICDC_CDCCR1_PDHPM | ICDC_CDCCR1_PDHP |
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ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST);
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//REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) |
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REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(23) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) |
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ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_6));
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i2s_codec_reset();
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REG_ICDC_CDCCR1 &= 0xfffffffc;
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//REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48)
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REG_ICDC_CDCCR2 = ( ICDC_CDCCR2_AINVOL(23) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48)
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| ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_6));
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mdelay(15);
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REG_ICDC_CDCCR1 &= 0xffecffff;
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REG_ICDC_CDCCR1 |= (ICDC_CDCCR1_EDAC | ICDC_CDCCR1_HPCG);
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REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST);
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mdelay(600);
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REG_ICDC_CDCCR1 &= 0xfff7ecff;
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mdelay(15);
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REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_PDVR | ICDC_CDCCR1_VRCGL | ICDC_CDCCR1_VRCGH);
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REG_ICDC_CDCCR1 |= (ICDC_CDCCR1_EDAC | ICDC_CDCCR1_HPCG);
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mdelay(2);
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mdelay(600);
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REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_HPCG | ICDC_CDCCR1_PDHPM | ICDC_CDCCR1_PDHP);
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mdelay(2);
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/* CDCCR1.ELININ=0, CDCCR1.EMIC=0, CDCCR1.EADC=0, CDCCR1.SW1ON=0, CDCCR1.EDAC=1, CDCCR1.SW2ON=1, CDCCR1.HPMUTE=0 */
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REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~((1 << 29) | (1 << 28) | (1 << 26) | (1 << 27) | (1 << 14))) | ((1 << 24) | (1 << 25));
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REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~(ICDC_CDCCR1_ELININ | ICDC_CDCCR1_EMIC | ICDC_CDCCR1_EADC |
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ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_EDAC
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| ICDC_CDCCR1_SW2ON);
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REG_ICDC_CDCCR2 = ((REG_ICDC_CDCCR2 & ~(0x3)) | 3);
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i2s_codec_set_samplerate(44100);
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REG_ICDC_CDCCR2 |= 3;
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HP_on_off_flag = 0; /* HP is off */
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}
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@ -296,7 +298,6 @@ void audiohw_mute(bool mute)
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void audiohw_preinit(void)
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{
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i2s_codec_init();
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}
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void audiohw_postinit(void)
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@ -306,5 +307,5 @@ void audiohw_postinit(void)
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void audiohw_init(void)
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{
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i2s_codec_init();
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}
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@ -35,6 +35,11 @@
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void pcm_postinit(void)
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{
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audiohw_postinit();
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/* playback sample:16 bits, burst:16 bytes */
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__i2s_set_transmit_trigger(4);
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__i2s_set_oss_sample_size(16);
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pcm_apply_settings();
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}
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@ -53,11 +58,6 @@ void pcm_play_dma_init(void)
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audiohw_init();
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}
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void pcm_apply_settings(void)
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{
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/* TODO */
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}
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void pcm_set_frequency(unsigned int frequency)
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{
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(void) frequency;
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@ -71,10 +71,8 @@ void pcm_set_frequency(unsigned int frequency)
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static void play_start_pcm(void)
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{
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pcm_apply_settings();
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__aic_enable_transmit_dma();
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__aic_enable_replay();
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__i2s_enable_transmit_dma();
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__i2s_enable_replay();
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
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}
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@ -83,18 +81,18 @@ static void play_stop_pcm(void)
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{
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) | DMAC_DCCSR_HLT) & ~DMAC_DCCSR_EN;
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__aic_disable_transmit_dma();
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__aic_disable_replay();
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__i2s_disable_transmit_dma();
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__i2s_disable_replay();
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}
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = 0;
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REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES;
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REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)addr);
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REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)AIC_DR);
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REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL) = size;
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REG_DMAC_DRSR(DMA_AIC_TX_CHANNEL) = DMAC_DRSR_RS_AICOUT;
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REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL) = ( DMAC_DCMD_SAI| DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DWDH_32
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REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL) = ( DMAC_DCMD_SAI| DMAC_DCMD_SWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DWDH_32
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| DMAC_DCMD_TIE);
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play_start_pcm();
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@ -134,7 +132,6 @@ void pcm_play_dma_pause(bool pause)
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play_stop_pcm();
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else
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play_start_pcm();
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}
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#ifdef HAVE_RECORDING
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@ -28,8 +28,11 @@
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#include "jz4740.h"
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#include "thread.h"
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//#define DEBUGF printf
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#if 1
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#define DEBUGF printf
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#else
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#define DEBUGF(...)
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#endif
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#define USB_EP0_IDLE 0
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#define USB_EP0_RX 1
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@ -86,7 +89,7 @@ static void readFIFO(struct usb_endpoint *ep, unsigned int size)
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register unsigned char *ptr = (unsigned char*)EP_PTR(ep);
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register unsigned int *ptr32 = (unsigned int*)ptr;
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register unsigned int s = size / 4;
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register unsigned int s = size >> 2;
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register unsigned int x;
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if(size > 0)
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@ -333,7 +336,7 @@ void usb_drv_stall(int endpoint, bool stall, bool in)
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select_endpoint(endpoint);
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if(endpoint == 0)
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if(endpoint == EP_CONTROL)
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{
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if(stall)
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REG_USB_REG_CSR0 |= USB_CSR0_SENDSTALL;
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@ -458,6 +461,8 @@ int usb_drv_recv(int endpoint, void* ptr, int length)
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void usb_drv_set_test_mode(int mode)
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{
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DEBUGF("usb_drv_set_test_mode(%d)", mode);
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switch(mode)
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{
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case 0:
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