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Fix iPod Nano 2G bootloader, which was apparently broken by the eabi transition

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28358 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann 2010-10-25 12:45:41 +00:00
parent e117b4a400
commit 7c6bb3f4ac
2 changed files with 20 additions and 11 deletions
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23
firmware/target/arm/s5l8700/boot.lds
View file

@ -9,8 +9,13 @@ OUTPUT_FORMAT(elf32-bigarm)
OUTPUT_ARCH(arm) OUTPUT_ARCH(arm)
STARTUP(target/arm/s5l8700/crt0.o) STARTUP(target/arm/s5l8700/crt0.o)
#ifdef IPOD_NANO2G
#define DRAMORIG 0x08000000 + ((MEMORYSIZE - 1) * 0x100000)
#define DRAMSIZE 0x00100000
#else
#define DRAMORIG 0x08000000 #define DRAMORIG 0x08000000
#define DRAMSIZE (MEMORYSIZE * 0x100000) #define DRAMSIZE (MEMORYSIZE * 0x100000)
#endif
#define IRAMORIG 0x22000000 #define IRAMORIG 0x22000000
#if CONFIG_CPU==S5L8701 #if CONFIG_CPU==S5L8701
@ -39,19 +44,25 @@ MEMORY
#if defined(IPOD_NANO2G) || defined(MEIZU_M6SL) #if defined(IPOD_NANO2G) || defined(MEIZU_M6SL)
#define LOAD_AREA IRAM #define LOAD_AREA IRAM
#else #else
#define NEEDS_INTVECT_COPYING
#define LOAD_AREA FLASH #define LOAD_AREA FLASH
#endif #endif
SECTIONS SECTIONS
{ {
#ifdef NEEDS_INTVECT_COPYING
.intvect : { .intvect : {
_intvectstart = . ; _intvectstart = . ;
*(.intvect) *(.intvect)
_intvectend = _newstart ; _intvectend = _newstart ;
} >IRAM AT> LOAD_AREA } >IRAM AT> LOAD_AREA
_intvectcopy = LOADADDR(.intvect) ; _intvectcopy = LOADADDR(.intvect) ;
#endif
.text : { .text : {
#ifndef NEEDS_INTVECT_COPYING
*(.intvect)
#endif
*(.init.text) *(.init.text)
*(.text*) *(.text*)
*(.glue_7*) *(.glue_7*)
@ -90,12 +101,8 @@ SECTIONS
_fiqstackend = .; _fiqstackend = .;
} > IRAM } > IRAM
. = DRAMORIG; /* The bss section is too large for IRAM on the Nano 2G, thanks to the FTL.
#ifdef IPOD_NANO2G We just move it 31MB into the DRAM */
/* The bss section is too large for IRAM - we just move it 12MB into the
DRAM */
. += (12*1024*1024);
#endif
.bss (NOLOAD) : { .bss (NOLOAD) : {
_edata = .; _edata = .;
*(.bss*); *(.bss*);
@ -104,5 +111,9 @@ SECTIONS
*(COMMON); *(COMMON);
. = ALIGN(0x4); . = ALIGN(0x4);
_end = .; _end = .;
#ifdef IPOD_NANO2G
} > DRAM } > DRAM
#else
} > IRAM
#endif
} }

8
firmware/target/arm/s5l8700/crt0.S
View file

@ -49,11 +49,7 @@
.global _newstart .global _newstart
/* Exception vectors */ /* Exception vectors */
start: start:
#if CONFIG_CPU==S5L8701 && defined(BOOTLOADER)
b newstart2
#else
b _newstart b _newstart
#endif
ldr pc, =undef_instr_handler ldr pc, =undef_instr_handler
ldr pc, =software_int_handler ldr pc, =software_int_handler
ldr pc, =prefetch_abort_handler ldr pc, =prefetch_abort_handler
@ -66,9 +62,11 @@ start:
#endif #endif
.ltorg .ltorg
_newstart: _newstart:
#if CONFIG_CPU!=S5L8701 || !defined(BOOTLOADER)
ldr pc, =newstart2 // we do not want to execute from 0x0 as iram will be mapped there ldr pc, =newstart2 // we do not want to execute from 0x0 as iram will be mapped there
.section .init.text,"ax",%progbits .section .init.text,"ax",%progbits
newstart2: newstart2:
#endif
msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
#ifdef ROCKBOX_BIG_ENDIAN #ifdef ROCKBOX_BIG_ENDIAN
@ -77,7 +75,7 @@ newstart2:
orr r0, r0, r1 orr r0, r0, r1
mcr 15, 0, r0, c1, c0, 0 // set bigendian mcr 15, 0, r0, c1, c0, 0 // set bigendian
#endif #endif
ldr r1, =0x3c800000 // disable watchdog ldr r1, =0x3c800000 // disable watchdog
mov r0, #0xa5 mov r0, #0xa5
str r0, [r1] str r0, [r1]