mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-11-11 06:02:37 -05:00
Initial commit of work-in-progress iPod port
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7781 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dave Chapman
parent
3cd5c646d0
commit
77372d1218
24 changed files with 2178 additions and 21 deletions
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@ -254,4 +254,18 @@ void adc_init(void)
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sleep(2); /* Ensure valid readings when adc_init returns */
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}
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#elif CONFIG_CPU == PP5020
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#warning Implement adc.c
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unsigned short adc_read(int channel)
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{
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return 0;
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}
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void adc_init(void)
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{
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}
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#endif
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@ -71,6 +71,43 @@
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#define SET_REG(reg,val) reg = ((val) << 8)
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#define SET_16BITREG(reg,val) reg = (val)
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#elif CONFIG_CPU == PP5020
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/* don't use sh7034 assembler routines */
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#define PREFER_C_READING
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#define PREFER_C_WRITING
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#define ATA_IOBASE 0xc30001e0
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#define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE)))
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#define ATA_ERROR (*((volatile unsigned char*)(ATA_IOBASE + 0x04)))
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#define ATA_NSECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x08)))
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#define ATA_SECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x0c)))
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#define ATA_LCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x10)))
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#define ATA_HCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x14)))
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#define ATA_SELECT (*((volatile unsigned char*)(ATA_IOBASE + 0x18)))
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#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x1c)))
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#define ATA_CONTROL (*((volatile unsigned char*)(0xc30003f8)))
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#define STATUS_BSY 0x80
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#define STATUS_RDY 0x40
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#define STATUS_DF 0x20
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#define STATUS_DRQ 0x08
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#define STATUS_ERR 0x01
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#define ERROR_ABRT 0x04
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#define WRITE_PATTERN1 0xa5
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#define WRITE_PATTERN2 0x5a
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#define WRITE_PATTERN3 0xaa
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#define WRITE_PATTERN4 0x55
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#define READ_PATTERN1 0xa5
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#define READ_PATTERN2 0x5a
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#define READ_PATTERN3 0xaa
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#define READ_PATTERN4 0x55
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#define SET_REG(reg,val) reg = (val)
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#define SET_16BITREG(reg,val) reg = (val)
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#elif CONFIG_CPU == SH7034
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#define SWAP_WORDS
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@ -362,7 +399,7 @@ static void copy_read_sectors(unsigned char* buf, int wordcount)
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{ /* loop compiles to 7 assembler instructions */
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/* takes 12 clock cycles (2 pipeline stalls, 1 wait) */
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#ifdef SWAP_WORDS
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*wbuf = letoh16(ATA_DATA);
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*wbuf = swap16(ATA_DATA);
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#else
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*wbuf = ATA_DATA;
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#endif
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@ -677,7 +714,7 @@ static void copy_write_sectors(const unsigned char* buf, int wordcount)
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#ifdef SWAP_WORDS
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/* loop compiles to 6 assembler instructions */
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/* takes 10 clock cycles (2 pipeline stalls) */
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SET_16BITREG(ATA_DATA, htole16(*wbuf));
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SET_16BITREG(ATA_DATA, swap16(*wbuf));
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#else
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SET_16BITREG(ATA_DATA, *wbuf);
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#endif
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@ -1242,6 +1279,8 @@ void ata_enable(bool on)
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or_l(0x00040000, &GPIO_FUNCTION);
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#elif CONFIG_CPU == TCC730
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#elif CONFIG_CPU == PP5020
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#warning Implement ata_enable()
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#endif
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}
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@ -1255,7 +1294,6 @@ static int identify(void)
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DEBUGF("identify() - not RDY\n");
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return -1;
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}
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SET_REG(ATA_COMMAND, CMD_IDENTIFY);
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if (!wait_for_start_of_transfer())
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@ -1267,10 +1305,11 @@ static int identify(void)
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for (i=0; i<SECTOR_SIZE/2; i++) {
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/* the IDENTIFY words are already swapped, so we need to treat
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this info differently that normal sector data */
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#ifdef SWAP_WORDS
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identify_info[i] = ATA_DATA;
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#if defined(ROCKBOX_IS_BIGENDIAN) && !defined(SWAP_WORDS)
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#warning Swapping ATA identify data
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identify_info[i] = swap16(ATA_DATA);
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#else
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identify_info[i] = letoh16(ATA_DATA);
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identify_info[i] = ATA_DATA;
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#endif
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}
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@ -1393,6 +1432,9 @@ int ata_init(void)
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bool coldstart = (P1 & 0x80) == 0;
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#elif CONFIG_CPU == MCF5249
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bool coldstart = (GPIO_FUNCTION & 0x00080000) == 0;
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#elif CONFIG_CPU == PP5020
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bool coldstart = false;
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#warning Implement coldstart variable
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#else
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bool coldstart = (PACR2 & 0x4000) != 0;
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#endif
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@ -1418,6 +1460,13 @@ int ata_init(void)
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or_l(0x00080000, &GPIO_FUNCTION);
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/* FYI: The IDECONFIGx registers are set by set_cpu_frequency() */
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#elif CONFIG_CPU == PP5020
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/* From ipod-ide.c:ipod_ide_register() */
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outl(inl(0xc3000028) | (1 << 5), 0xc3000028);
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outl(inl(0xc3000028) & ~0x10000000, 0xc3000028);
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outl(0x10, 0xc3000000);
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outl(0x80002150, 0xc3000004);
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#endif
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sleeping = false;
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189
firmware/drivers/i2c-pp5020.c
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189
firmware/drivers/i2c-pp5020.c
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@ -0,0 +1,189 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2005 by Dave Chapman
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "cpu.h"
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#include "kernel.h"
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#include "logf.h"
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#include "system.h"
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#include "i2c-pp5020.h"
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#define I2C_DEVICE_1 ((volatile unsigned char *)0)
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#define I2C_DEVICE_2 ((volatile unsigned char *)0)
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/* Local functions definitions */
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static int i2c_write_byte(int device, unsigned char data);
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static int i2c_gen_start(int device);
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static void i2c_gen_stop(int device);
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static volatile unsigned char *i2c_get_addr(int device);
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#define IPOD_I2C_BASE 0x7000c000
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#define IPOD_I2C_CTRL (IPOD_I2C_BASE+0x00)
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#define IPOD_I2C_ADDR (IPOD_I2C_BASE+0x04)
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#define IPOD_I2C_DATA0 (IPOD_I2C_BASE+0x0c)
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#define IPOD_I2C_DATA1 (IPOD_I2C_BASE+0x10)
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#define IPOD_I2C_DATA2 (IPOD_I2C_BASE+0x14)
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#define IPOD_I2C_DATA3 (IPOD_I2C_BASE+0x18)
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#define IPOD_I2C_STATUS (IPOD_I2C_BASE+0x1c)
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/* IPOD_I2C_CTRL bit definitions */
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#define IPOD_I2C_SEND 0x80
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/* IPOD_I2C_STATUS bit definitions */
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#define IPOD_I2C_BUSY (1<<6)
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#define POLL_TIMEOUT (HZ)
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static int
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ipod_i2c_wait_not_busy(void)
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{
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unsigned long timeout;
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#if 0
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timeout = jiffies + POLL_TIMEOUT;
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while (time_before(jiffies, timeout)) {
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if (!(inb(IPOD_I2C_STATUS) & IPOD_I2C_BUSY)) {
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return 0;
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}
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yield();
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}
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return -ETIMEDOUT;
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#endif
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}
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/* Public functions */
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void i2c_init(void)
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{
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/* From ipodlinux */
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outl(inl(0x6000600c) | 0x1000, 0x6000600c); /* enable 12 */
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outl(inl(0x60006004) | 0x1000, 0x60006004); /* start reset 12 */
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outl(inl(0x60006004) & ~0x1000, 0x60006004); /* end reset 12 */
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outl(0x0, 0x600060a4);
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outl(0x80 | (0 << 8), 0x600060a4);
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i2c_readbyte(0x8, 0);
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}
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void i2c_close(void)
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{
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}
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/**
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* Writes bytes to the selected device.
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*
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* Returns number of bytes successfully send or -1 if START failed
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*/
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int i2c_write(int device, unsigned char *buf, int count)
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{
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/* From ipodlinux */
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int data_addr;
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int i;
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if (count < 1 || count > 4) {
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return -2;
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}
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if (ipod_i2c_wait_not_busy() < 0) {
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return -1;
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}
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// clear top 15 bits, left shift 1
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outb((device << 17) >> 16, IPOD_I2C_ADDR);
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outb(inb(IPOD_I2C_CTRL) & ~0x20, IPOD_I2C_CTRL);
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data_addr = IPOD_I2C_DATA0;
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for ( i = 0; i < count; i++ ) {
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outb(*buf++, data_addr);
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data_addr += 4;
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}
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outb((inb(IPOD_I2C_CTRL) & ~0x26) | ((count-1) << 1), IPOD_I2C_CTRL);
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outb(inb(IPOD_I2C_CTRL) | IPOD_I2C_SEND, IPOD_I2C_CTRL);
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return 0x0;
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return count;
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}
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/* Write a byte to the interface, returns 0 on success, -1 otherwise. */
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int i2c_write_byte(int device, unsigned char data)
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{
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if (ipod_i2c_wait_not_busy() < 0) {
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return -2;
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}
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// clear top 15 bits, left shift 1
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outb((device << 17) >> 16, IPOD_I2C_ADDR);
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outb(inb(IPOD_I2C_CTRL) & ~0x20, IPOD_I2C_CTRL);
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outb(data, IPOD_I2C_DATA0);
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outb((inb(IPOD_I2C_CTRL) & ~0x26), IPOD_I2C_CTRL);
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outb(inb(IPOD_I2C_CTRL) | IPOD_I2C_SEND, IPOD_I2C_CTRL);
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return 0;
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}
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/* Returns 0 on success, -1 on failure */
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int i2c_gen_start(int device)
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{
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volatile unsigned char *regs = i2c_get_addr(device);
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long count = 0;
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/* Wait for bus to become free */
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while ((regs[O_MBSR] & IBB) && (count < MAX_LOOP))
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{
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yield();
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count++;
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}
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if (count >= MAX_LOOP)
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return -1;
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regs[O_MBCR] |= MSTA | MTX; /* Generate START */
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return 0;
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}
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void i2c_gen_stop(int device)
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{
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volatile unsigned char *regs = i2c_get_addr(device);
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regs[O_MBCR] &= ~MSTA; /* Clear MSTA to generate STOP */
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}
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volatile unsigned char *i2c_get_addr(int device)
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{
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if (device == 1)
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return I2C_DEVICE_1;
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return I2C_DEVICE_2;
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}
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1266
firmware/drivers/lcd-16bit.c
Normal file
1266
firmware/drivers/lcd-16bit.c
Normal file
File diff suppressed because it is too large
Load diff
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@ -73,6 +73,8 @@ void power_init(void)
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#ifdef HAVE_SPDIF_POWER
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spdif_power_enable(false);
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#endif
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#elif CONFIG_CPU == PP5020
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#warning Implement power_init()
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#else
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#ifdef HAVE_POWEROFF_ON_PB5
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PBCR2 &= ~0x0c00; /* GPIO for PB5 */
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@ -163,6 +165,8 @@ void ide_power_enable(bool on)
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and_l(~0x80000000, &GPIO_OUT);
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else
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or_l(0x80000000, &GPIO_OUT);
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#elif CONFIG_CPU == PP5020
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#warning Implement ide_power_enable()
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#elif defined(GMINI_ARCH)
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if(on)
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P1 |= 0x08;
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@ -213,6 +217,9 @@ bool ide_powered(void)
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{
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#if CONFIG_CPU == MCF5249
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return (GPIO_OUT & 0x80000000)?false:true;
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#elif CONFIG_CPU == PP5020
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#warning Implement ide_powered()
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return true;
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#elif defined(GMINI_ARCH)
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return (P1 & 0x08?true:false);
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#else /* SH1 based archos */
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@ -244,6 +251,8 @@ void power_off(void)
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set_irq_level(HIGHEST_IRQ_LEVEL);
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#if CONFIG_CPU == MCF5249
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and_l(~0x00080000, &GPIO1_OUT);
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#elif CONFIG_CPU == PP5020
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#warning Implement power_off()
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#elif defined(GMINI_ARCH)
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P1 &= ~1;
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P1CON &= ~1;
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@ -27,8 +27,8 @@
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#include "lcd.h"
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#include "serial.h"
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#if (CONFIG_CPU != MCF5249) && (CONFIG_CPU != TCC730)
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/* FIX: this doesn't work on iRiver or Gmini yet */
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#if (CONFIG_CPU != MCF5249) && (CONFIG_CPU != TCC730) && (CONFIG_CPU != PP5020)
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/* FIX: this doesn't work on iRiver or Gmini or iPod yet */
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#ifndef HAVE_MMC /* MMC takes serial port 1, so don't mess with it */
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