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synced 2025-12-09 05:05:20 -05:00
TCC78x: Implement the user timer, rework some of the timer register #defines, and use udelay() instead of the hacky sleep_ms() in the D2 LCD driver. Doom works now.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20585 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rob Purchase
parent
8739af490e
commit
75b37696fb
7 changed files with 102 additions and 63 deletions
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@ -116,33 +116,11 @@ static void lcd_write_reg(unsigned char reg, unsigned short val)
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restore_irq(level);
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}
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/*
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TEMP: Rough millisecond delay routine used by the LCD panel init sequence.
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PCK_TCT must first have been initialised to 2Mhz by calling clock_init().
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*/
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static void sleep_ms(unsigned int ms)
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{
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/* disable timer */
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TCFG1 = 0;
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/* set Timer1 reference value based on 125kHz tick */
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TREF1 = ms * 125;
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/* single count, zero the counter, divider = 16 [2^(3+1)], enable */
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TCFG1 = (1<<9) | (1<<8) | (3<<4) | 1;
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/* wait until Timer1 ref reached */
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while (!(TIREQ & TF1)) {};
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}
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static void lcd_display_on(void)
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{
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/* power on sequence as per the D2 firmware */
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GPIOA_SET = (1<<16);
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sleep_ms(10);
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udelay(10000);
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lcd_write_reg(1, 0x1D);
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lcd_write_reg(2, 0x0);
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@ -164,14 +142,14 @@ static void lcd_display_on(void)
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lcd_write_reg(23, 0x0);
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lcd_write_reg(24, 0x0);
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lcd_write_reg(25, 0x0);
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sleep_ms(10);
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udelay(10000);
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lcd_write_reg(9, 0x4055);
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lcd_write_reg(10, 0x0);
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sleep_ms(40);
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udelay(40000);
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lcd_write_reg(10, 0x2000);
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sleep_ms(40);
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udelay(40000);
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lcd_write_reg(1, 0xC01D);
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lcd_write_reg(2, 0x204);
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@ -191,11 +169,11 @@ static void lcd_display_on(void)
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lcd_write_reg(23, 0x406);
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lcd_write_reg(24, 0x2);
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lcd_write_reg(25, 0x0);
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sleep_ms(60);
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udelay(60000);
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lcd_write_reg(9, 0xA55);
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lcd_write_reg(10, 0x111F);
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sleep_ms(10);
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udelay(10000);
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/* tell that we're on now */
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display_on = true;
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@ -210,10 +188,10 @@ static void lcd_display_off(void)
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lcd_write_reg(9, 0x55);
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lcd_write_reg(10, 0x1417);
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lcd_write_reg(5, 0x4003);
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sleep_ms(10);
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udelay(10000);
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lcd_write_reg(9, 0x0);
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sleep_ms(10);
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udelay(10000);
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/* kill power to LCD panel (unconfirmed) */
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GPIOA_CLEAR = (1<<16);
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@ -29,16 +29,13 @@
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void tick_start(unsigned int interval_in_ms)
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{
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/* disable Timer0 */
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TCFG0 &= ~1;
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TCFG(0) &= ~TCFG_EN;
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/* set counter reference value based on 1Mhz tick */
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TREF0 = interval_in_ms * 1000;
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TREF(0) = interval_in_ms * 1000;
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/* Timer0 = reset to 0, divide=2, IRQ enable, enable (continuous) */
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TCFG0 = (1<<8) | (0<<4) | (1<<3) | 1;
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/* Unmask timer IRQ */
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IEN |= TIMER0_IRQ_MASK;
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TCFG(0) = TCFG_CLEAR | (0 << TCFG_SEL) | TCFG_IEN | TCFG_EN;
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}
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/* NB: Since we are using a single timer IRQ, tick tasks are dispatched as
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@ -35,10 +35,12 @@
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#define outw(a,b) (*(volatile unsigned short *) (b) = (a))
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/* TC32 is configured to 1MHz in clock_init() */
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#define USEC_TIMER TC32MCNT
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static inline void udelay(unsigned usecs)
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{
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unsigned stop = TC32MCNT + usecs;
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while (TIME_BEFORE(TC32MCNT, stop));
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unsigned stop = USEC_TIMER + usecs;
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while (TIME_BEFORE(USEC_TIMER, stop));
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}
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#endif /* SYSTEM_TARGET_H */
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@ -229,11 +229,14 @@ static void clock_init(void)
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"nop \n\t"
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);
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/* configure PCK_TCT to 2Mhz (clock source 4 (Xin) divided by 6) */
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/* Configure PCK_TCT to 2Mhz (Xin divided by 6) */
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PCLK_TCT = PCK_EN | (CKSEL_XIN<<24) | 5;
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/* set TC32 timer to XIN divided by 12 (1MHz) */
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/* Set TC32 timer to be our USEC_TIMER (Xin divided by 12 = 1MHz) */
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TC32EN = (1<<24) | 11;
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/* Unmask common timer IRQ (shared by tick and user timer) */
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IEN |= TIMER0_IRQ_MASK;
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}
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#endif
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@ -21,8 +21,8 @@
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#ifndef TIMER_TARGET_H
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#define TIMER_TARGET_H
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/* timers are based on XIN (12Mhz) */
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#define TIMER_FREQ (12000000)
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/* Timer is based on PCK_TCT (set to 2Mhz in system.c) */
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#define TIMER_FREQ (2000000)
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bool __timer_set(long cycles, bool set);
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bool __timer_register(void);
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@ -25,40 +25,82 @@
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#include "timer.h"
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#include "logf.h"
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/* Use the TC32 counter [sourced by Xin:12Mhz] for this timer, as it's the
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only one that allows a 32-bit counter (Timer0-5 are 16/20 bit only). */
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static const int prescale_shifts[] = {1, 2, 3, 4, 5, 10, 12};
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bool __timer_set(long cycles, bool start)
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{
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(void)cycles;
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(void)start;
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return false;
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bool found = false;
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int prescale_option = 0;
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int actual_cycles = 0;
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/* Use the first prescale that fits Timer4's 20-bit counter */
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while (!found && prescale_option < 7)
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{
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actual_cycles = cycles >> prescale_shifts[prescale_option];
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if (actual_cycles < 0x100000)
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found = true;
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else
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prescale_option++;
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}
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if (!found)
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return false;
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/* Stop the timer and set new prescale & ref count */
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TCFG(4) &= ~TCFG_EN;
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TCFG(4) = prescale_option << TCFG_SEL;
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TREF(4) = actual_cycles;
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if (start && pfn_unregister != NULL)
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{
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pfn_unregister();
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pfn_unregister = NULL;
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}
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return true;
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}
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bool __timer_register(void)
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{
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return false;
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int oldstatus = disable_interrupt_save(IRQ_STATUS);
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TCFG(4) |= TCFG_CLEAR | TCFG_IEN | TCFG_EN;
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restore_interrupt(oldstatus);
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return true;
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}
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void __timer_unregister(void)
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{
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int oldstatus = disable_interrupt_save(IRQ_STATUS);
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TCFG(4) &= ~TCFG_EN;
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restore_interrupt(oldstatus);
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}
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/* Timer interrupt processing - all timers (inc. tick) have a single IRQ */
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void TIMER0(void)
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{
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if (TIREQ & TF0) /* Timer0 reached ref value */
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if (TIREQ & TIREQ_TF0) /* Timer0 reached ref value */
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{
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/* Run through the list of tick tasks */
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call_tick_tasks();
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/* reset Timer 0 IRQ & ref flags */
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TIREQ |= TI0 | TF0;
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TIREQ = TIREQ_TI0 | TIREQ_TF0;
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}
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if (TC32IRQ & (1<<3)) /* end of TC32 prescale */
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if (TIREQ & TIREQ_TF4) /* Timer4 reached ref value */
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{
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/* dispatch timer */
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/* dispatch user timer */
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if (pfn_timer != NULL)
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pfn_timer();
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TIREQ = TIREQ_TI4 | TIREQ_TF4;
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}
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}
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