mirror of
https://github.com/Rockbox/rockbox.git
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Sansa as3525v2: move SD embryo code to a common dir
Select it based on as3535/as3525v2 so Clip+/Fuzev2 will be able to use it too git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24222 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré
parent
d668900848
commit
7478cfcbf7
2 changed files with 3 additions and 3 deletions
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@ -1,777 +0,0 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 Daniel Ankers
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* Copyright © 2008-2009 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h" /* for HAVE_MULTIVOLUME */
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#include "fat.h"
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#include "thread.h"
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#include "hotswap.h"
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#include "system.h"
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#include "kernel.h"
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#include "cpu.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "as3525v2.h"
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#include "pl081.h" /* DMA controller */
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#include "dma-target.h" /* DMA request lines */
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#include "clock-target.h"
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#include "panic.h"
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#include "stdbool.h"
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#include "ata_idle_notify.h"
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#include "sd.h"
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#include "lcd.h"
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#include <stdarg.h>
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#include "sysfont.h"
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static int line = 0;
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static void printf(const char *format, ...)
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{
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char buf[50];
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int len;
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va_list ap;
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va_start(ap, format);
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len = vsnprintf(buf, sizeof(buf), format, ap);
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va_end(ap);
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lcd_puts(0, line++, buf);
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lcd_update();
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if(line >= LCD_HEIGHT/SYSFONT_HEIGHT)
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line = 0;
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}
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/* command flags */
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#define MCI_NO_RESP (0<<0)
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#define MCI_RESP (1<<0)
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#define MCI_LONG_RESP (1<<1)
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/* controller registers */
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#define SD_BASE 0xC6070000
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/*
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* REGISTERS
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*
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* m = modify (orr/bic), r = read, w = write
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*
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* 00 m/r/w
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* 04 m/w
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* 08 m
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* 0C ?
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* 10 r/w
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* 14 w
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* 18 m
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* 1C w ==> set a bit before transfer (sometimes) !
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* 20 w ==> set a bit before transfer !
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* 24 w irq mask ?
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* 28 w arg
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* 2C r/w cmd
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* 30 r resp0
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* 34 r resp1
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* 38 r resp2
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* 3C r resp3
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* 40 r irq status (only read in isr)
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* 44 m/w irq clear
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* 48 r
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* 4C m
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* 64 w
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* 70 r
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* 100 FIFO
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*/
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/*
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* STATUS register
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* & 0xBA80
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* & 8
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* & 0x428
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* & 0x418
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*/
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/*
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* INFO on CMD register
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*
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* if(cmd >= 200) cmd -= 200; (>= 200 = acmd?)
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*
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* COMMANDS (| (x<<16) BITS RESPONSE
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*
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* 1 ? reserved & ~0x80, | 0x40, | 0x8000 ?
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* 5 ? reserved for I/O cards & ~0x80, | 0x40 ?
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* 11 ? reserved & ~0x80, | 0x40, | 0x2200, | 0x800 ?
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* 14 ? reserved & ~0x80, | 0x40, | 0x2200, ~0x1000 ?
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* 19 ? reserved & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
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* 20 ? reserved & ~0x80, |0x40, | 0x2700, | 0x800 ?
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* 23 ? reserved & ~0x80, | 0x40 ?
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* 39 ? reserved & ~0x80, | 0x40 ?
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* 51 ? reserved & ~0x80, | 0x40, | 0x2000, | 0x200 ?
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* 52 ? reserved for I/O & ~0x80, | 0x40 ?
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* 53 ? reserved for I/O & ~0x80, | 0x40, | 0x2200, & ~0x1000 ?
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* 253 ? & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
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*
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* 0 GO IDLE STATE & ~0x4000, & ~0xC0, | 0x4000 no
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* 2 ALL SEND CID & ~0x4000, |0xC0 r2
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* 3 SEND RCA & ~0x80, | 0x40 r6
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* 6 SWITCH_FUNC & ~0x80, | 0x40 r1
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* 7 SELECT CARD & ~0x80, | 0x40 r1b
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* 8 SEND IF COND & ~0x80, | 0x40, | 0x2200, & ~0x1000 r7
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* 9 SEND CSD & ~0x4000, | 0xc0 r2
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* 12 STOP TRANSMISSION & ~0x80, | 0x40, | 0x4000 r1b
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* 13 SEND STATUS & ~0x80, | 0x40 r1
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* 15 GO INACTIVE STATE & ~0x4000, & ~0xC0 no
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* 16 SET BLOCKLEN & ~0x80, | 0x40 r1
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* 17 READ SINGLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
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* 18 READ MULTIPLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
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* 24 WRITE BLOCK & ~0x80, |0x40, | 0x2700 r1
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* 25 WRITE MULTIPLE BLOCK & ~0x80, |0x40, | 0x2700 r1
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* 41 SEND APP OP COND & ~0x80, | 0x40 r3
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* 42 LOCK UNLOCK & ~0x80, |0x40, | 0x2700 r1
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* 55 APP CMD & ~0x80, | 0x40 r1
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* 206 SET BUS WIDTH & ~0x80, | 0x40, | 0x2000 r1
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* 207 SELECT CARD ? & ~0x4000, & ~0xC0 r1b
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*
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*
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* bits 5:0 = cmd
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* bit 6 (0x40) = response
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* bit 7 (0x80) = long response
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* => like pl180 <=
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* BIT SET IN COMANDS:
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*
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* bit 8 (0x100) ? write block, write multi_block, lock/unlock
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* bit 9 (0x200) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock
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* bit 10 (0x400) ? write block, write multi_block, lock/unlock
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* bit 11 (0x800) ?
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* bit 12 (0x1000) ?
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* bit 13 (0x2000) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock, set bus width
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* bit 14 (0x4000) ? go idle state, stop transmission
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* bit 15 (0x8000) ?
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*
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*/
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/* FIXME */
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#define MCI_POWER
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#define MCI_CLOCK
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#define MCI_ARGUMENT (*(volatile unsigned long *) (SD_BASE+0x28))
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#define MCI_COMMAND (*(volatile unsigned long *) (SD_BASE+0x2C))
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#define MCI_RESPCMD
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#define MCI_RESP0 (*(volatile unsigned long *) (SD_BASE+0x30))
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#define MCI_RESP1 (*(volatile unsigned long *) (SD_BASE+0x34))
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#define MCI_RESP2 (*(volatile unsigned long *) (SD_BASE+0x38))
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#define MCI_RESP3 (*(volatile unsigned long *) (SD_BASE+0x3C))
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#define MCI_DATA_TIMER
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#define MCI_DATA_LENGTH
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#define MCI_DATA_CTRL
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#define MCI_STATUS (*(volatile unsigned long *) (SD_BASE+0x40))
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#define MCI_CLEAR (*(volatile unsigned long *) (SD_BASE+0x44))
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#define MCI_MASK (*(volatile unsigned long *) (SD_BASE+0x24))
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#define MCI_SELECT
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#define MCI_ERROR 0 /* FIXME */
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#define MCI_FIFO ((unsigned long *) (SD_BASE+0x100))
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#define MCI_COMMAND_ENABLE (1<<31)
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#define MCI_COMMAND_ACTIVE MCI_COMMAND_ENABLE
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#define MCI_COMMAND_RESPONSE (1<<6)
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#define MCI_COMMAND_LONG_RESPONSE (1<<7)
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static int sd_init_card(void);
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static void init_controller(void);
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static tCardInfo card_info;
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/* for compatibility */
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static long last_disk_activity = -1;
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#define MIN_YIELD_PERIOD 5 /* ticks */
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static long next_yield = 0;
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static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
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static const char sd_thread_name[] = "ata/sd";
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static struct mutex sd_mtx SHAREDBSS_ATTR;
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static struct event_queue sd_queue;
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#ifndef BOOTLOADER
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static bool sd_enabled = false;
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#endif
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static struct wakeup transfer_completion_signal;
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static volatile bool retry;
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static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
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void INT_NAND(void)
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{
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(*(volatile unsigned long *) (SD_BASE+0x0)) &= ~0x10; // ?
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const int status = MCI_STATUS;
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#if 0
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if(status & MCI_ERROR)
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retry = true;
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#endif
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// wakeup_signal(&transfer_completion_signal);
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MCI_CLEAR = status;
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static int x = 0;
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switch(status)
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{
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case 0x4: /* cmd received ? */
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case 0x104: /* ? 1 time in init (10th interrupt) */
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case 0x2000: /* ? after cmd read_mul_blocks | 0x2200 */
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case 0x820: /* ? 1 time while copy from FIFO (not DMA) */
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case 0x20: /* ? rx fifo empty */
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break;
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default:
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printf("%2d NAND 0x%x", ++x, status);
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int delay = 0x100000; while(delay--) ;
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}
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/*
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* 0x48 = some kind of status
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* 0x106
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* 0x4106
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* 1B906
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* 1F906
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* 1B906
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* 1F906
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* 1F906
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* 1906
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* ...
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* 6906
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* 6D06 (dma)
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*
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* read resp (6, 7, 12, 42) : while bit 9 is unset ;
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*
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*/
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printf("%x %x", status, (*(volatile unsigned long *) (SD_BASE+0x48)));
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//while(!button_read_device());
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//while(button_read_device());
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(*(volatile unsigned long *) (SD_BASE+0x0)) |= 0x10; // ?
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}
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static bool send_cmd(const int cmd, const int arg, const int flags,
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unsigned long *response)
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{
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int val;
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val = cmd | MCI_COMMAND_ENABLE;
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if(flags & MCI_RESP)
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{
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val |= MCI_COMMAND_RESPONSE;
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if(flags & MCI_LONG_RESP)
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val |= MCI_COMMAND_LONG_RESPONSE;
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}
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if(cmd == 18) /* r */
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val |= 0x2200;
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else if(cmd == 25) /* w */
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val |= 0x2700;
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int tmp = (*(volatile unsigned long *) (SD_BASE+0x10));
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(*(volatile unsigned long *) (SD_BASE+0x10)) = 0;
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MCI_COMMAND = 0x80202000;
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MCI_ARGUMENT = 0;
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int max = 10;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
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(*(volatile unsigned long *) (SD_BASE+0x08)) &= ~0xff;
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(*(volatile unsigned long *) (SD_BASE+0x08)) |= 0;
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MCI_COMMAND = 0x80202000;
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MCI_ARGUMENT = 0;
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max = 10;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
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(*(volatile unsigned long *) (SD_BASE+0x10)) = tmp;
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MCI_COMMAND = 0x80202000;
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MCI_ARGUMENT = 0;
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max = 10;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
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mci_delay();
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MCI_ARGUMENT = arg;
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MCI_COMMAND = val;
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(*(volatile unsigned long *) (SD_BASE+0x00)) |= 0x10;
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max = 1000;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE); /* wait for cmd completion */
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if(!max)
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return false;
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if(flags & MCI_RESP)
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{
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if(flags & MCI_LONG_RESP)
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{
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/* store the response in little endian order for the words */
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response[0] = MCI_RESP3;
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response[1] = MCI_RESP2;
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response[2] = MCI_RESP1;
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response[3] = MCI_RESP0;
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}
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else
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response[0] = MCI_RESP0;
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}
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return true;
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}
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static int sd_init_card(void)
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{
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unsigned long response;
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unsigned long temp_reg[4];
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int max_tries = 100; /* max acmd41 attemps */
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bool sdhc;
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int i;
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if(!send_cmd(SD_GO_IDLE_STATE, 0, MCI_NO_RESP, NULL))
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return -1;
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mci_delay();
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sdhc = false;
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if(send_cmd(SD_SEND_IF_COND, 0x1AA, MCI_RESP, &response))
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if((response & 0xFFF) == 0x1AA)
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sdhc = true;
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do {
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/* some MicroSD cards seems to need more delays, so play safe */
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mci_delay();
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mci_delay();
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mci_delay();
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/* app_cmd */
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if( !send_cmd(SD_APP_CMD, 0, MCI_RESP, &response) /*||
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!(response & (1<<5))*/ )
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{
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return -2;
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}
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/* acmd41 */
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if(!send_cmd(SD_APP_OP_COND, (sdhc ? 0x40FF8000 : (1<<23)),
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MCI_RESP, &card_info.ocr))
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return -3;
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} while(!(card_info.ocr & (1<<31)) && max_tries--);
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if(max_tries < 0)
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return -4;
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mci_delay();
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mci_delay();
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mci_delay();
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/* send CID */
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if(!send_cmd(SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP, card_info.cid))
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return -5;
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/* send RCA */
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if(!send_cmd(SD_SEND_RELATIVE_ADDR, 0, MCI_RESP, &card_info.rca))
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return -6;
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/* send CSD */
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if(!send_cmd(SD_SEND_CSD, card_info.rca,
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MCI_RESP|MCI_LONG_RESP, temp_reg))
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return -7;
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for(i=0; i<4; i++)
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card_info.csd[3-i] = temp_reg[i];
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sd_parse_csd(&card_info);
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if(!send_cmd(SD_APP_CMD, 0, MCI_RESP, &response) ||
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!send_cmd(42, 0, MCI_NO_RESP, NULL)) /* disconnect the 50 KOhm pull-up
|
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resistor on CD/DAT3 */
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return -13;
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if(!send_cmd(SD_APP_CMD, card_info.rca, MCI_NO_RESP, NULL))
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return -10;
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if(!send_cmd(SD_SET_BUS_WIDTH, card_info.rca | 2, MCI_NO_RESP, NULL))
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return -11;
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(*(volatile unsigned long *) (SD_BASE+0x18)) &= ~(0x10001);
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(*(volatile unsigned long *) (SD_BASE+0x18)) |= 0x1;
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if(!send_cmd(SD_SELECT_CARD, card_info.rca, MCI_NO_RESP, NULL))
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return -9;
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/* not sent in init_card() by OF */
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if(!send_cmd(SD_SET_BLOCKLEN, card_info.blocksize, MCI_NO_RESP,
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NULL))
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return -12;
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card_info.initialized = 1;
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return 0;
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}
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static void sd_thread(void) __attribute__((noreturn));
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static void sd_thread(void)
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{
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struct queue_event ev;
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bool idle_notified = false;
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|
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while (1)
|
||||
{
|
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queue_wait_w_tmo(&sd_queue, &ev, HZ);
|
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|
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switch ( ev.id )
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{
|
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case SYS_TIMEOUT:
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if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
|
||||
{
|
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idle_notified = false;
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}
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||||
else
|
||||
{
|
||||
/* never let a timer wrap confuse us */
|
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next_yield = current_tick;
|
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|
||||
if (!idle_notified)
|
||||
{
|
||||
call_storage_idle_notifys(false);
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idle_notified = true;
|
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}
|
||||
}
|
||||
break;
|
||||
#if 0
|
||||
case SYS_USB_CONNECTED:
|
||||
usb_acknowledge(SYS_USB_CONNECTED_ACK);
|
||||
/* Wait until the USB cable is extracted again */
|
||||
usb_wait_for_disconnect(&sd_queue);
|
||||
|
||||
break;
|
||||
case SYS_USB_DISCONNECTED:
|
||||
usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void init_controller(void)
|
||||
{
|
||||
int tmp = (*(volatile unsigned long *) (SD_BASE+0x70));
|
||||
int shift = 1 + ((tmp << 26) >> 27);
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x04)) &= ~((1 << shift) -1);
|
||||
(*(volatile unsigned long *) (SD_BASE+0x04)) = (1 << shift) -1;
|
||||
|
||||
mci_delay();
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x00)) |= 1;
|
||||
int max = 1000;
|
||||
while(max-- && !(*(volatile unsigned long *) (SD_BASE+0x00)) & 1)
|
||||
;
|
||||
|
||||
MCI_CLEAR = 0xffffffff;
|
||||
MCI_MASK = 0xffffbffe;
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x00)) |= 0x10;
|
||||
(*(volatile unsigned long *) (SD_BASE+0x14)) = 0xffffffff;
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x10)) = (1<<shift) - 1;
|
||||
|
||||
MCI_ARGUMENT = 0;
|
||||
MCI_COMMAND = 0x80202000;
|
||||
max = 10;
|
||||
while(max-- && (MCI_COMMAND & (1<<31))) ;
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x64)) = 0xfffff;
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x4c)) = ~0x7fff0fff; // interrupt mask ?
|
||||
(*(volatile unsigned long *) (SD_BASE+0x4c)) |= 0x503f0080;
|
||||
|
||||
MCI_MASK = 0xffffbffe;
|
||||
}
|
||||
|
||||
int sd_init(void)
|
||||
{
|
||||
int ret;
|
||||
CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
|
||||
|
||||
CGU_IDE = (1<<7) /* AHB interface enable */ |
|
||||
(1<<6) /* interface enable */ |
|
||||
((CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1) << 2) |
|
||||
1; /* clock source = PLLA */
|
||||
|
||||
CGU_MEMSTICK = (1<<8) | (1<<7) |
|
||||
(CLK_DIV(AS3525_PLLA_FREQ, AS3525_MS_FREQ) -1) | 1;
|
||||
|
||||
/* ?? */
|
||||
*(volatile int*)0xC80F003C = (1<<7) |
|
||||
(CLK_DIV(AS3525_PLLA_FREQ, 24000000) -1) | 1;
|
||||
|
||||
wakeup_init(&transfer_completion_signal);
|
||||
|
||||
VIC_INT_ENABLE |= INTERRUPT_NAND;
|
||||
|
||||
init_controller();
|
||||
ret = sd_init_card();
|
||||
if(ret < 0)
|
||||
return ret;
|
||||
|
||||
/* init mutex */
|
||||
mutex_init(&sd_mtx);
|
||||
|
||||
queue_init(&sd_queue, true);
|
||||
create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
|
||||
sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
|
||||
|
||||
#ifndef BOOTLOADER
|
||||
sd_enabled = true;
|
||||
sd_enable(false);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef STORAGE_GET_INFO
|
||||
void sd_get_info(struct storage_info *info)
|
||||
{
|
||||
info->sector_size=card_info.blocksize;
|
||||
info->num_sectors=card_info.numblocks;
|
||||
info->vendor="Rockbox";
|
||||
info->product = "Internal Storage";
|
||||
info->revision="0.00";
|
||||
}
|
||||
#endif
|
||||
|
||||
static int sd_wait_for_state(unsigned int state)
|
||||
{
|
||||
unsigned long response;
|
||||
unsigned int timeout = 100; /* ticks */
|
||||
long t = current_tick;
|
||||
|
||||
while (1)
|
||||
{
|
||||
long tick;
|
||||
|
||||
if(!send_cmd(SD_SEND_STATUS, card_info.rca,
|
||||
MCI_RESP, &response))
|
||||
return -1;
|
||||
|
||||
if (((response >> 9) & 0xf) == state)
|
||||
return 0;
|
||||
|
||||
if(TIME_AFTER(current_tick, t + timeout))
|
||||
return -10 * ((response >> 9) & 0xf);
|
||||
|
||||
if (TIME_AFTER((tick = current_tick), next_yield))
|
||||
{
|
||||
yield();
|
||||
timeout += current_tick - tick;
|
||||
next_yield = tick + MIN_YIELD_PERIOD;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int sd_transfer_sectors(unsigned long start, int count, void* buf, bool write)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
if((int)buf & 3)
|
||||
panicf("unaligned transfer");
|
||||
|
||||
/* skip SanDisk OF */
|
||||
start += 0xf000;
|
||||
|
||||
mutex_lock(&sd_mtx);
|
||||
#ifndef BOOTLOADER
|
||||
sd_enable(true);
|
||||
#endif
|
||||
|
||||
if (card_info.initialized <= 0)
|
||||
{
|
||||
ret = sd_init_card();
|
||||
if (!(card_info.initialized))
|
||||
{
|
||||
panicf("card not initialised (%d)", ret);
|
||||
goto sd_transfer_error;
|
||||
}
|
||||
}
|
||||
|
||||
last_disk_activity = current_tick;
|
||||
ret = sd_wait_for_state(SD_TRAN);
|
||||
if (ret < 0)
|
||||
{
|
||||
static const char *st[9] = {
|
||||
"IDLE", "RDY", "IDENT", "STBY", "TRAN", "DATA", "RCV", "PRG", "DIS"
|
||||
};
|
||||
if(ret <= -10)
|
||||
panicf("wait for state failed (%s)", st[(-ret / 10) % 9]);
|
||||
else
|
||||
panicf("wait for state failed");
|
||||
goto sd_transfer_error;
|
||||
}
|
||||
|
||||
dma_retain();
|
||||
|
||||
while(count)
|
||||
{
|
||||
/* Interrupt handler might set this to true during transfer */
|
||||
retry = false;
|
||||
/* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
|
||||
* register, so we have to transfer maximum 127 sectors at a time. */
|
||||
//unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
|
||||
unsigned int transfer = count;
|
||||
|
||||
const int cmd =
|
||||
write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x00)) |= 2;
|
||||
while(( *(volatile unsigned long *) (SD_BASE+0x00)) & 2) ;
|
||||
|
||||
//(*(volatile unsigned long *) (SD_BASE+0x1c)) = 512;
|
||||
(*(volatile unsigned long *) (SD_BASE+0x20)) = transfer * 512;
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x00)) |= 2;
|
||||
while(( *(volatile unsigned long *) (SD_BASE+0x00)) & 2) ;
|
||||
|
||||
(*(volatile unsigned long *) (SD_BASE+0x4c)) &= ~0x7fff0fff;
|
||||
|
||||
if(0)
|
||||
{
|
||||
(*(volatile unsigned long *) (SD_BASE+0x00)) |= 0x20;
|
||||
MCI_MASK = 0xBE8C;
|
||||
(*(volatile unsigned long *) (SD_BASE+0x4c)) |= 0x503f0080;
|
||||
}
|
||||
else
|
||||
{
|
||||
MCI_MASK = 0xBEB8;
|
||||
(*(volatile unsigned long *) (SD_BASE+0x4c)) |= 0x3f0030;
|
||||
}
|
||||
|
||||
if(card_info.ocr & (1<<30) ) /* SDHC */
|
||||
ret = send_cmd(cmd, start, MCI_NO_RESP, NULL);
|
||||
else
|
||||
ret = send_cmd(cmd, start * SD_BLOCK_SIZE,
|
||||
MCI_NO_RESP, NULL);
|
||||
|
||||
if (ret < 0)
|
||||
panicf("transfer multiple blocks failed (%d)", ret);
|
||||
|
||||
if(write)
|
||||
dma_enable_channel(0, buf, MCI_FIFO, DMA_PERI_SD,
|
||||
DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
|
||||
else
|
||||
dma_enable_channel(0, MCI_FIFO, buf, DMA_PERI_SD,
|
||||
DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
|
||||
|
||||
line = 0;
|
||||
lcd_clear_display();
|
||||
printf("dma ->");
|
||||
|
||||
wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
|
||||
|
||||
printf("dma <-");
|
||||
int delay = 0x1000000; while(delay--) ;
|
||||
|
||||
if(!retry)
|
||||
{
|
||||
buf += transfer * SECTOR_SIZE;
|
||||
start += transfer;
|
||||
count -= transfer;
|
||||
}
|
||||
|
||||
last_disk_activity = current_tick;
|
||||
|
||||
if(!send_cmd(SD_STOP_TRANSMISSION, 0, MCI_NO_RESP, NULL))
|
||||
{
|
||||
ret = -666;
|
||||
panicf("STOP TRANSMISSION failed");
|
||||
goto sd_transfer_error;
|
||||
}
|
||||
|
||||
ret = sd_wait_for_state(SD_TRAN);
|
||||
if (ret < 0)
|
||||
{
|
||||
panicf(" wait for state TRAN failed (%d)", ret);
|
||||
goto sd_transfer_error;
|
||||
}
|
||||
}
|
||||
|
||||
dma_release();
|
||||
|
||||
#ifndef BOOTLOADER
|
||||
sd_enable(false);
|
||||
#endif
|
||||
mutex_unlock(&sd_mtx);
|
||||
return 0;
|
||||
|
||||
sd_transfer_error:
|
||||
panicf("transfer error : %d",ret);
|
||||
card_info.initialized = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
int sd_read_sectors(unsigned long start, int count, void* buf)
|
||||
{
|
||||
return sd_transfer_sectors(start, count, buf, false);
|
||||
}
|
||||
|
||||
int sd_write_sectors(unsigned long start, int count, const void* buf)
|
||||
{
|
||||
#if defined(BOOTLOADER) /* we don't need write support in bootloader */
|
||||
(void) start;
|
||||
(void) count;
|
||||
(void) buf;
|
||||
return -1;
|
||||
#else
|
||||
return sd_transfer_sectors(start, count, (void*)buf, true);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifndef BOOTLOADER
|
||||
void sd_sleep(void)
|
||||
{
|
||||
}
|
||||
|
||||
void sd_spin(void)
|
||||
{
|
||||
}
|
||||
|
||||
void sd_spindown(int seconds)
|
||||
{
|
||||
(void)seconds;
|
||||
}
|
||||
|
||||
long sd_last_disk_activity(void)
|
||||
{
|
||||
return last_disk_activity;
|
||||
}
|
||||
|
||||
void sd_enable(bool on)
|
||||
{
|
||||
/* TODO */
|
||||
(void)on;
|
||||
return;
|
||||
}
|
||||
|
||||
tCardInfo *card_get_info_target(int card_no)
|
||||
{
|
||||
(void)card_no;
|
||||
return &card_info;
|
||||
}
|
||||
|
||||
#endif /* BOOTLOADER */
|
||||
Loading…
Add table
Add a link
Reference in a new issue