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AMS Sansa: Remove BUSWIDTH and BLOCKLEN commands and revise strategy for High Speed SD Card.

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We are unable to successfully put the pl180 controller into 4 bit mode so we should not put the cards into widebus mode for now.
The blocklength is hardcoded to 512 in sd.c and BLOCKLEN defaults to 512 so this command is not needed.
It appears the internal SD card is not HS capable but sending it the HS switch command does not seem to hinder it's init process.
Assume all SD_V2 cards are HS capable and send them the HS switch command.
If View disk info shows 50.0 MBit/s the card has HS timings.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23137 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jack Halpin 2009-10-12 18:55:10 +00:00
parent b285a77be5
commit 7331bd5381
1 changed files with 26 additions and 26 deletions
Download patch file Download diff file Expand all files Collapse all files

52
firmware/target/arm/as3525/ata_sd_as3525.c
View file

@ -281,6 +281,9 @@ static int sd_init_card(const int drive)
} while(!(card_info[drive].ocr & (1<<31)));
MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* full speed for controller clock */
mci_delay();
/* send CID */
if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
temp_reg))
@ -294,43 +297,38 @@ static int sd_init_card(const int drive)
&card_info[drive].rca))
return -6;
/* Select card to put it in TRAN state */
if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
return -7;
/* Try to switch V2 cards to HS timings, non HS seem to ignore this */
if(sd_v2)
{
if(sd_wait_for_state(drive, SD_TRAN))
return -8;
if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_ARG, NULL))
return -9;
mci_delay();
}
/* go back to STBY state so we can read csd */
if(!send_cmd(drive, SD_DESELECT_CARD, 0, MCI_ARG, NULL))
return -10;
/* send CSD */
if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
MCI_RESP|MCI_LONG_RESP|MCI_ARG, temp_reg))
return -7;
return -11;
for(i=0; i<4; i++)
card_info[drive].csd[3-i] = temp_reg[i];
sd_parse_csd(&card_info[drive]);
/* Select card to put back in TRAN state */
if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
return -9;
if(!send_cmd(drive, SD_APP_CMD, card_info[drive].rca, MCI_ARG, NULL))
return -10;
if(!send_cmd(drive, SD_SET_BUS_WIDTH, card_info[drive].rca | 2, MCI_ARG, NULL))
return -11;
if(!send_cmd(drive, SD_SET_BLOCKLEN, card_info[drive].blocksize, MCI_ARG,
NULL))
return -12;
card_info[drive].initialized = 1;
MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* full speed for controller clock */
mci_delay();
/* If card is HS capable switch to HS timings */
if(card_info[drive].speed > 125000)
{
if(sd_wait_for_state(drive, SD_TRAN))
return -13;
if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_ARG, NULL))
return -14;
}
/*
* enable bank switching
* without issuing this command, we only have access to 1/4 of the blocks
@ -341,9 +339,11 @@ static int sd_init_card(const int drive)
{
const int ret = sd_select_bank(-1);
if(ret < 0)
return ret - 15;
return ret - 13;
}
card_info[drive].initialized = 1;
return 0;
}