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usb-s3c6400x.[ch], button-clickwheel.c: Move s5l8701-specific parts to where they belong, prepare for s5l8702
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28800 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sparmann
parent
8e1021bd4c
commit
70447b529c
4 changed files with 369 additions and 322 deletions
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@ -39,7 +39,7 @@
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#include "serial.h"
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#include "power.h"
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#include "powermgmt.h"
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#if defined(IPOD_NANO2G)
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#if defined(IPOD_NANO2G) || defined(IPOD_6G)
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#include "pmu-target.h"
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#endif
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@ -49,18 +49,8 @@
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#ifdef CPU_PP
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#define CLICKWHEEL_DATA (*(volatile unsigned long*)(0x7000c140))
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#elif CONFIG_CPU==S5L8701
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#define PCON15 (*((volatile uint32_t*)(0x3CF000F0)))
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#define PUNK15 (*((volatile uint32_t*)(0x3CF000FC)))
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#define WHEEL00 (*((volatile uint32_t*)(0x3C200000)))
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#define WHEEL04 (*((volatile uint32_t*)(0x3C200004)))
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#define WHEEL08 (*((volatile uint32_t*)(0x3C200008)))
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#define WHEEL0C (*((volatile uint32_t*)(0x3C20000C)))
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#define WHEEL10 (*((volatile uint32_t*)(0x3C200010)))
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#define WHEELINT (*((volatile uint32_t*)(0x3C200014)))
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#define WHEELRX (*((volatile uint32_t*)(0x3C200018)))
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#define WHEELTX (*((volatile uint32_t*)(0x3C20001C)))
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#define CLICKWHEEL_DATA (*(volatile unsigned long*)(0x3c200018))
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#elif CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702
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#define CLICKWHEEL_DATA WHEELRX
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#else
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#error CPU architecture not supported!
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#endif
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@ -93,7 +83,7 @@ int int_btn = BUTTON_NONE;
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static bool send_events = true;
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#endif
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#if CONFIG_CPU==S5L8701
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#if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702
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static struct wakeup button_init_wakeup;
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#endif
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@ -265,7 +255,7 @@ static inline int ipod_4g_button_read(void)
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}
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}
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#if CONFIG_CPU==S5L8701
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#if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702
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else if ((status & 0x8000FFFF) == 0x8000023A)
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{
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if (status & 0x00010000)
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@ -345,7 +335,7 @@ bool headphones_inserted(void)
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return (GPIOA_INPUT_VAL & 0x80)?true:false;
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}
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#else
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void INT_SPI(void)
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void INT_WHEEL(void)
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{
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int clickwheel_events = WHEELINT;
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@ -359,6 +349,7 @@ void INT_SPI(void)
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void s5l_clickwheel_init(void)
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{
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#if CONFIG_CPU==S5L8701
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PWRCONEXT &= ~1;
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PCON15 = (PCON15 & ~0xFFFF0000) | 0x22220000;
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PUNK15 = 0xF0;
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@ -370,24 +361,35 @@ void s5l_clickwheel_init(void)
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WHEELTX = 0x8000023A;
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WHEEL04 |= 1;
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PDAT10 &= ~2;
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#elif CONFIG_CPU==S5L8702
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//TODO: Implement
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#endif
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}
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void button_init_device(void)
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{
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wakeup_init(&button_init_wakeup);
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#if CONFIG_CPU==S5L8701
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INTMSK |= (1<<26);
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#elif CONFIG_CPU==S5L8702
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//TODO: Implement
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#endif
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s5l_clickwheel_init();
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wakeup_wait(&button_init_wakeup, HZ / 10);
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}
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bool button_hold(void)
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{
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return ((PDAT14 & (1 << 6)) == 0);
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//TODO: Implement
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//return ((PDAT14 & (1 << 6)) == 0);
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return false;
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}
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bool headphones_inserted(void)
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{
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return ((PDAT14 & (1 << 5)) != 0);
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//TODO: Implement
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//return ((PDAT14 & (1 << 5)) == 0);
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return false;
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}
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#endif
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@ -419,6 +421,8 @@ int button_read_device(void)
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WHEEL00 = 0;
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WHEEL10 = 0;
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PWRCONEXT |= 1;
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#elif CONFIG_CPU==S5L8702
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//TODO: Implement
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#endif
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}
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else
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@ -430,6 +434,8 @@ int button_read_device(void)
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#elif CONFIG_CPU==S5L8701
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pmu_ldo_power_on(1); /* enable clickwheel power supply */
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s5l_clickwheel_init();
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#elif CONFIG_CPU==S5L8702
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//TODO: Implement
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#endif
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}
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}
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@ -24,15 +24,13 @@
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#include "usb-target.h"
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#include "usb_drv.h"
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#define OTGBASE 0x38800000
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#define PHYBASE 0x3C400000
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#include "usb-s3c6400x.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "panic.h"
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#include "usb-s3c6400x.h"
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#ifdef HAVE_USBSTACK
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#include "usb_ch9.h"
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#include "usb_core.h"
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@ -72,7 +70,7 @@ static void reset_endpoints(int reinit)
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DOEPCTL0 = 0x8000; /* EP0 OUT ACTIVE */
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DOEPTSIZ0 = 0x20080040; /* EP0 OUT Transfer Size:
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64 Bytes, 1 Packet, 1 Setup Packet */
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DOEPDMA0 = (uint32_t)&ctrlreq;
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DOEPDMA0 = &ctrlreq;
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DOEPCTL0 |= 0x84000000; /* EP0 OUT ENABLE CLEARNAK */
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if (reinit)
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{
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@ -139,10 +137,13 @@ static void usb_reset(void)
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DCTL = 0x802; /* Soft Disconnect */
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OPHYPWR = 0; /* PHY: Power up */
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OPHYUNK1 = 1;
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OPHYUNK2 = 0xE3F;
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OPHYCLK = SYNOPSYSOTG_CLOCK;
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ORSTCON = 1; /* PHY: Assert Software Reset */
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for (i = 0; i < 50; i++);
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ORSTCON = 0; /* PHY: Deassert Software Reset */
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OPHYCLK = 0; /* PHY: 48MHz clock */
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OPHYUNK3 = 0x600;
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GRSTCTL = 1; /* OTG: Assert Software Reset */
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while (GRSTCTL & 1); /* Wait for OTG to ack reset */
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@ -150,7 +151,7 @@ static void usb_reset(void)
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GRXFSIZ = 0x00000200; /* RX FIFO: 512 bytes */
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GNPTXFSIZ = 0x02000200; /* Non-periodic TX FIFO: 512 bytes */
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GAHBCFG = 0x27; /* OTG AHB config: Unmask ints, burst length 4, DMA on */
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GAHBCFG = SYNOPSYSOTG_AHBCFG;
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GUSBCFG = 0x1408; /* OTG: 16bit PHY and some reserved bits */
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DCFG = 4; /* Address 0 */
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@ -375,12 +376,16 @@ void usb_drv_stall(int endpoint, bool stall, bool in)
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void usb_drv_init(void)
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{
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/* Enable USB clock */
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#if CONFIG_CPU==S5L8701
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PWRCON &= ~0x4000;
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PWRCONEXT &= ~0x800;
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PCGCCTL = 0;
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/* unmask irq */
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INTMSK |= INTMSK_USB_OTG;
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#elif CONFIG_CPU==S5L8702
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PWRCON(0) &= ~0x4;
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PWRCON(1) &= ~0x8;
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VIC0INTENABLE |= 1 << 19;
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#endif
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PCGCCTL = 0;
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/* reset the beast */
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usb_reset();
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@ -394,8 +399,13 @@ void usb_drv_exit(void)
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PCGCCTL = 1; /* Shut down PHY clock */
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OPHYPWR = 0xF; /* PHY: Power down */
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#if CONFIG_CPU==S5L8701
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PWRCON |= 0x4000;
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PWRCONEXT |= 0x800;
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#elif CONFIG_CPU==S5L8702
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PWRCON(0) |= 0x4;
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PWRCON(1) |= 0x8;
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#endif
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}
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void usb_init_device(void)
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@ -406,10 +416,16 @@ void usb_init_device(void)
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/* Power up the core clocks to allow writing
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to some registers needed to power it down */
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PCGCCTL = 0;
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#if CONFIG_CPU==S5L8701
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PWRCON &= ~0x4000;
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PWRCONEXT &= ~0x800;
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PCGCCTL = 0;
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INTMSK |= INTMSK_USB_OTG;
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#elif CONFIG_CPU==S5L8702
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PWRCON(0) &= ~0x4;
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PWRCON(1) &= ~0x8;
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VIC0INTENABLE |= 1 << 19;
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#endif
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usb_drv_exit();
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}
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@ -441,8 +457,13 @@ void usb_init_device(void)
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PCGCCTL = 1; /* Shut down PHY clock */
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OPHYPWR = 0xF; /* PHY: Power down */
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#if CONFIG_CPU==S5L8701
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PWRCON |= 0x4000;
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PWRCONEXT |= 0x800;
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#elif CONFIG_CPU==S5L8702
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PWRCON(0) |= 0x4;
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PWRCON(1) |= 0x8;
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#endif
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}
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void usb_enable(bool on)
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