mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-11-09 21:22:39 -05:00
usb-s3c6400x: move usb_init_device
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31478 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
parent
249218a5c2
commit
6fdc91e64f
2 changed files with 40 additions and 41 deletions
|
|
@ -21,9 +21,12 @@
|
||||||
|
|
||||||
#include "config.h"
|
#include "config.h"
|
||||||
#include "usb.h"
|
#include "usb.h"
|
||||||
|
#include "usb-s3c6400x.h"
|
||||||
|
#include "cpu.h"
|
||||||
|
|
||||||
#ifdef HAVE_USBSTACK
|
#ifdef HAVE_USBSTACK
|
||||||
#include "usb_core.h"
|
#include "usb_core.h"
|
||||||
|
#include "usb_drv.h"
|
||||||
#include "power.h"
|
#include "power.h"
|
||||||
|
|
||||||
void usb_enable(bool on)
|
void usb_enable(bool on)
|
||||||
|
|
@ -38,6 +41,24 @@ int usb_detect(void)
|
||||||
return USB_INSERTED;
|
return USB_INSERTED;
|
||||||
return USB_EXTRACTED;
|
return USB_EXTRACTED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void usb_init_device(void)
|
||||||
|
{
|
||||||
|
/* Power up the core clocks to allow writing
|
||||||
|
to some registers needed to power it down */
|
||||||
|
PCGCCTL = 0;
|
||||||
|
#if CONFIG_CPU==S5L8701
|
||||||
|
PWRCON &= ~0x4000;
|
||||||
|
PWRCONEXT &= ~0x800;
|
||||||
|
INTMSK |= INTMSK_USB_OTG;
|
||||||
|
#elif CONFIG_CPU==S5L8702
|
||||||
|
PWRCON(0) &= ~0x4;
|
||||||
|
PWRCON(1) &= ~0x8;
|
||||||
|
VIC0INTENABLE |= 1 << 19;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
usb_drv_exit();
|
||||||
|
}
|
||||||
#else
|
#else
|
||||||
void usb_enable(bool on)
|
void usb_enable(bool on)
|
||||||
{
|
{
|
||||||
|
|
@ -48,4 +69,20 @@ int usb_detect(void)
|
||||||
{
|
{
|
||||||
return USB_EXTRACTED;
|
return USB_EXTRACTED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void usb_init_device(void)
|
||||||
|
{
|
||||||
|
DCTL = DCTL_pwronprgdone | DCTL_sftdiscon;
|
||||||
|
|
||||||
|
ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */
|
||||||
|
PCGCCTL = 1; /* Shut down PHY clock */
|
||||||
|
OPHYPWR = 0xF; /* PHY: Power down */
|
||||||
|
|
||||||
|
#if CONFIG_CPU==S5L8701
|
||||||
|
PWRCON |= 0x4000;
|
||||||
|
PWRCONEXT |= 0x800;
|
||||||
|
#elif CONFIG_CPU==S5L8702
|
||||||
|
PWRCON(0) |= 0x4;
|
||||||
|
PWRCON(1) |= 0x8;
|
||||||
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -31,7 +31,6 @@
|
||||||
|
|
||||||
#include "usb-s3c6400x.h"
|
#include "usb-s3c6400x.h"
|
||||||
|
|
||||||
#ifdef HAVE_USBSTACK
|
|
||||||
#include "usb_ch9.h"
|
#include "usb_ch9.h"
|
||||||
#include "usb_core.h"
|
#include "usb_core.h"
|
||||||
#include <inttypes.h>
|
#include <inttypes.h>
|
||||||
|
|
@ -334,6 +333,9 @@ void usb_drv_stall(int endpoint, bool stall, bool in)
|
||||||
|
|
||||||
void usb_drv_init(void)
|
void usb_drv_init(void)
|
||||||
{
|
{
|
||||||
|
for (unsigned i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++)
|
||||||
|
semaphore_init(&endpoints[i].complete, 1, 0);
|
||||||
|
|
||||||
/* Enable USB clock */
|
/* Enable USB clock */
|
||||||
#if CONFIG_CPU==S5L8701
|
#if CONFIG_CPU==S5L8701
|
||||||
PWRCON &= ~0x4000;
|
PWRCON &= ~0x4000;
|
||||||
|
|
@ -369,47 +371,7 @@ void usb_drv_exit(void)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
void usb_init_device(void)
|
|
||||||
{
|
|
||||||
for (unsigned i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++)
|
|
||||||
semaphore_init(&endpoints[i].complete, 1, 0);
|
|
||||||
|
|
||||||
/* Power up the core clocks to allow writing
|
|
||||||
to some registers needed to power it down */
|
|
||||||
PCGCCTL = 0;
|
|
||||||
#if CONFIG_CPU==S5L8701
|
|
||||||
PWRCON &= ~0x4000;
|
|
||||||
PWRCONEXT &= ~0x800;
|
|
||||||
INTMSK |= INTMSK_USB_OTG;
|
|
||||||
#elif CONFIG_CPU==S5L8702
|
|
||||||
PWRCON(0) &= ~0x4;
|
|
||||||
PWRCON(1) &= ~0x8;
|
|
||||||
VIC0INTENABLE |= 1 << 19;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
usb_drv_exit();
|
|
||||||
}
|
|
||||||
|
|
||||||
void usb_attach(void)
|
void usb_attach(void)
|
||||||
{
|
{
|
||||||
usb_enable(true);
|
usb_enable(true);
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
|
||||||
void usb_init_device(void)
|
|
||||||
{
|
|
||||||
DCTL = DCTL_pwronprgdone | DCTL_sftdiscon;
|
|
||||||
|
|
||||||
ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */
|
|
||||||
PCGCCTL = 1; /* Shut down PHY clock */
|
|
||||||
OPHYPWR = 0xF; /* PHY: Power down */
|
|
||||||
|
|
||||||
#if CONFIG_CPU==S5L8701
|
|
||||||
PWRCON |= 0x4000;
|
|
||||||
PWRCONEXT |= 0x800;
|
|
||||||
#elif CONFIG_CPU==S5L8702
|
|
||||||
PWRCON(0) |= 0x4;
|
|
||||||
PWRCON(1) |= 0x8;
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue