From 6fc87143df4a986c4d9ed3032fdf966bc242f487 Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Sat, 19 Apr 2025 18:02:09 +0100 Subject: [PATCH] stm32: add sample files for OpenOCD and GDB usage Change-Id: I674ebab9c25a8dcd69bcebf665dc8d749c380b42 --- utils/stm32tools/gdbinit | 13 +++++++++++++ utils/stm32tools/openocd.cfg | 16 ++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 utils/stm32tools/gdbinit create mode 100644 utils/stm32tools/openocd.cfg diff --git a/utils/stm32tools/gdbinit b/utils/stm32tools/gdbinit new file mode 100644 index 0000000000..41ebfb2c8e --- /dev/null +++ b/utils/stm32tools/gdbinit @@ -0,0 +1,13 @@ +## Example GDB script for loading a bootloader binary using OpenOCD + +# Set target binary and connect to OpenOCD +file "./bootloader.elf" +target extended-remote localhost:3333 + +# Reset target and flush register cache since GDB is apparently +# not smart enough to do this itself. +monitor reset halt +maintenance flush register-cache + +# Download binary to target +load "./bootloader.elf" diff --git a/utils/stm32tools/openocd.cfg b/utils/stm32tools/openocd.cfg new file mode 100644 index 0000000000..fd18608d04 --- /dev/null +++ b/utils/stm32tools/openocd.cfg @@ -0,0 +1,16 @@ +## OpenOCD configuration for STM32H7-based targets with SWD (eg. Echo R1) + +# Setup for STLINK-V3SET + STM32H7 +source [find interface/stlink-dap.cfg] +source [find target/stm32h7x.cfg] +reset_config srst_only srst_open_drain srst_nogate connect_assert_srst +init + +# Workaround for OpenOCD complaining about externally asserted resets. +# Possibly an electrical issue. +adapter assert srst +adapter deassert srst + +# OpenOCD doesn't handle soft breakpoints correctly for Cortex-M7 when ICache is enabled: +# https://sourceforge.net/p/openocd/mailman/openocd-user/thread/6668098.sCNexbpv2J@linux-5nlr.menet/ +gdb_breakpoint_override hard