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Move the FIFO emptying up, as having it after lcd_write_single_data16() causes problems with uneven transfers (I'm not sure why).

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22581 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Thomas Martitz 2009-09-01 02:06:37 +00:00
parent e4345365f1
commit 6f9fde95a5
2 changed files with 10 additions and 10 deletions
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10
firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c
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@ -119,13 +119,13 @@ void lcd_write_data(const fb_data* p_bytes, int count)
/* Wait if push fifo is full */
while ((DBOP_STAT & (1<<6)) != 0);
}
/* due to the 32bit alignment requirement, we possibly need to do a
* 16bit transfer at the end also */
if (count > 0)
lcd_write_single_data16(*(fb_data*)data);
/* While push fifo is not empty */
while ((DBOP_STAT & (1<<10)) == 0);
/* due to the 32bit alignment requirement or uneven count,
* we possibly need to do a 16bit transfer at the end also */
if (count > 0)
lcd_write_single_data16(*(fb_data*)data);
}
static void lcd_write_reg(int reg, int value)