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Commit to certain names for cache coherency APIs and discard the aliases.

Browse source 
Wouldn't surprise me a bit to get some non-green.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31339 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2011-12-17 07:27:24 +00:00
parent 43d7a75369
commit 6a67707b5e
51 changed files with 120 additions and 213 deletions
Download patch file Download diff file Expand all files Collapse all files

4
apps/codec_thread.c
View file

@ -550,9 +550,9 @@ static void do_callback(void (* callback)(void))
if (callback) if (callback)
{ {
cpucache_commit_discard(); commit_discard_idcache();
callback(); callback();
cpucache_commit(); commit_dcache();
} }
} }

6
apps/codecs.c
View file

@ -116,8 +116,8 @@ struct codec_api ci = {
semaphore_release, semaphore_release,
#endif #endif
cpucache_flush, commit_dcache,
cpucache_invalidate, commit_discard_dcache,
/* strings and memory */ /* strings and memory */
strcpy, strcpy,
@ -165,6 +165,8 @@ struct codec_api ci = {
/* new stuff at the end, sort into place next time /* new stuff at the end, sort into place next time
the API gets incompatible */ the API gets incompatible */
commit_discard_idcache,
}; };
void codec_get_full_path(char *path, const char *codec_root_fn) void codec_get_full_path(char *path, const char *codec_root_fn)

7
apps/codecs.h
View file

@ -75,7 +75,7 @@
#define CODEC_ENC_MAGIC 0x52454E43 /* RENC */ #define CODEC_ENC_MAGIC 0x52454E43 /* RENC */
/* increase this every time the api struct changes */ /* increase this every time the api struct changes */
#define CODEC_API_VERSION 43 #define CODEC_API_VERSION 44
/* update this to latest version if a change to the api struct breaks /* update this to latest version if a change to the api struct breaks
backwards compatibility (and please take the opportunity to sort in any backwards compatibility (and please take the opportunity to sort in any
@ -169,8 +169,8 @@ struct codec_api {
void (*semaphore_release)(struct semaphore *s); void (*semaphore_release)(struct semaphore *s);
#endif /* NUM_CORES */ #endif /* NUM_CORES */
void (*cpucache_flush)(void); void (*commit_dcache)(void);
void (*cpucache_invalidate)(void); void (*commit_discard_dcache)(void);
/* strings and memory */ /* strings and memory */
char* (*strcpy)(char *dst, const char *src); char* (*strcpy)(char *dst, const char *src);
@ -223,6 +223,7 @@ struct codec_api {
/* new stuff at the end, sort into place next time /* new stuff at the end, sort into place next time
the API gets incompatible */ the API gets incompatible */
void (*commit_discard_idcache)(void);
}; };
/* codec header */ /* codec header */

4
apps/codecs/codec_crt0.c
View file

@ -45,7 +45,7 @@ enum codec_status codec_start(enum codec_entry_call_reason reason)
ci->memcpy(iramstart, iramcopy, iram_size); ci->memcpy(iramstart, iramcopy, iram_size);
ci->memset(iedata, 0, ibss_size); ci->memset(iedata, 0, ibss_size);
/* make the icache (if it exists) up to date with the new code */ /* make the icache (if it exists) up to date with the new code */
ci->cpucache_invalidate(); ci->commit_discard_idcache();
/* barrier to prevent reordering iram copy and BSS clearing, /* barrier to prevent reordering iram copy and BSS clearing,
* because the BSS segment alias the IRAM copy. * because the BSS segment alias the IRAM copy.
*/ */
@ -56,7 +56,7 @@ enum codec_status codec_start(enum codec_entry_call_reason reason)
/* Some parts of bss may be used via a no-cache alias (at least /* Some parts of bss may be used via a no-cache alias (at least
* portalplayer has this). If we don't clear the cache, those aliases * portalplayer has this). If we don't clear the cache, those aliases
* may read garbage */ * may read garbage */
ci->cpucache_invalidate(); ci->commit_dcache();
} }
#endif /* CONFIG_PLATFORM */ #endif /* CONFIG_PLATFORM */

2
apps/codecs/mpa.c
View file

@ -274,7 +274,7 @@ static void mad_synth_thread_quit(void)
die = 1; die = 1;
ci->semaphore_release(&synth_pending_sem); ci->semaphore_release(&synth_pending_sem);
ci->thread_wait(mad_synth_thread_id); ci->thread_wait(mad_synth_thread_id);
ci->cpucache_invalidate(); ci->commit_discard_dcache();
} }
#else #else
static inline void mad_synth_thread_ready(void) static inline void mad_synth_thread_ready(void)

6
apps/codecs/spc.c
View file

@ -295,7 +295,7 @@ static bool emu_thread_process_msg(struct sample_queue_chunk *chunk)
if (id == SPC_EMU_LOAD) if (id == SPC_EMU_LOAD)
{ {
struct spc_load *ld = (struct spc_load *)chunk->data; struct spc_load *ld = (struct spc_load *)chunk->data;
ci->cpucache_invalidate(); ci->commit_discard_dcache();
SPC_Init(&spc_emu); SPC_Init(&spc_emu);
sample_queue.retval = SPC_load_spc(&spc_emu, ld->buf, ld->size); sample_queue.retval = SPC_load_spc(&spc_emu, ld->buf, ld->size);
@ -368,7 +368,7 @@ static bool spc_emu_start(void)
static inline int load_spc_buffer(uint8_t *buf, size_t size) static inline int load_spc_buffer(uint8_t *buf, size_t size)
{ {
struct spc_load ld = { buf, size }; struct spc_load ld = { buf, size };
ci->cpucache_flush(); ci->commit_dcache();
return emu_thread_send_msg(SPC_EMU_LOAD, (intptr_t)&ld); return emu_thread_send_msg(SPC_EMU_LOAD, (intptr_t)&ld);
} }
@ -378,7 +378,7 @@ static inline void spc_emu_quit(void)
emu_thread_send_msg(SPC_EMU_QUIT, 0); emu_thread_send_msg(SPC_EMU_QUIT, 0);
/* Wait for emu thread to be killed */ /* Wait for emu thread to be killed */
ci->thread_wait(emu_thread_id); ci->thread_wait(emu_thread_id);
ci->cpucache_invalidate(); ci->commit_discard_dcache();
} }
} }

6
apps/plugin.c
View file

@ -428,8 +428,8 @@ static const struct plugin_api rockbox_api = {
cancel_cpu_boost, cancel_cpu_boost,
#endif #endif
cpucache_flush, commit_dcache,
cpucache_invalidate, commit_discard_dcache,
lc_open, lc_open,
lc_open_from_mem, lc_open_from_mem,
@ -794,6 +794,8 @@ static const struct plugin_api rockbox_api = {
/* new stuff at the end, sort into place next time /* new stuff at the end, sort into place next time
the API gets incompatible */ the API gets incompatible */
commit_discard_idcache,
}; };
int plugin_load(const char* plugin, const void* parameter) int plugin_load(const char* plugin, const void* parameter)

9
apps/plugin.h
View file

@ -148,7 +148,7 @@ void* plugin_get_buffer(size_t *buffer_size);
#define PLUGIN_MAGIC 0x526F634B /* RocK */ #define PLUGIN_MAGIC 0x526F634B /* RocK */
/* increase this every time the api struct changes */ /* increase this every time the api struct changes */
#define PLUGIN_API_VERSION 214 #define PLUGIN_API_VERSION 215
/* update this to latest version if a change to the api struct breaks /* update this to latest version if a change to the api struct breaks
backwards compatibility (and please take the opportunity to sort in any backwards compatibility (and please take the opportunity to sort in any
@ -513,8 +513,8 @@ struct plugin_api {
void (*cancel_cpu_boost)(void); void (*cancel_cpu_boost)(void);
#endif #endif
void (*cpucache_flush)(void); void (*commit_dcache)(void);
void (*cpucache_invalidate)(void); void (*commit_discard_dcache)(void);
/* load code api for overlay */ /* load code api for overlay */
void* (*lc_open)(const char *filename, unsigned char *buf, size_t buf_size); void* (*lc_open)(const char *filename, unsigned char *buf, size_t buf_size);
@ -948,7 +948,8 @@ struct plugin_api {
/* new stuff at the end, sort into place next time /* new stuff at the end, sort into place next time
the API gets incompatible */ the API gets incompatible */
void (*commit_discard_idcache)(void);
}; };
/* plugin header */ /* plugin header */

4
apps/plugins/fft/fft.c
View file

@ -1249,7 +1249,7 @@ static void fft_thread_entry(void)
} }
/* write back output for other processor and invalidate for next frame read */ /* write back output for other processor and invalidate for next frame read */
rb->cpucache_invalidate(); rb->commit_discard_dcache();
int new_tail = output_tail ^ 1; int new_tail = output_tail ^ 1;
@ -1311,7 +1311,7 @@ static void fft_close_fft(void)
/* Handle our FFT thread. */ /* Handle our FFT thread. */
fft_thread_run = false; fft_thread_run = false;
rb->thread_wait(fft_thread); rb->thread_wait(fft_thread);
rb->cpucache_invalidate(); rb->commit_discard_dcache();
} }
#else /* NUM_CORES == 1 */ #else /* NUM_CORES == 1 */
/* everything serialize on single-core and FFT gets to use IRAM main stack if /* everything serialize on single-core and FFT gets to use IRAM main stack if

2
apps/plugins/mpegplayer/alloc.c
View file

@ -149,7 +149,7 @@ bool mpeg_alloc_init(unsigned char *buf, size_t mallocsize)
return false; return false;
} }
IF_COP(rb->cpucache_invalidate()); IF_COP(rb->commit_discard_dcache());
return true; return true;
} }

8
apps/plugins/mpegplayer/video_thread.c
View file

@ -550,7 +550,7 @@ static void video_thread_msg(struct video_thread_data *td)
} }
else else
{ {
IF_COP(rb->cpucache_invalidate()); IF_COP(rb->commit_discard_dcache());
vo_lock(); vo_lock();
rb->lcd_update(); rb->lcd_update();
vo_unlock(); vo_unlock();
@ -1007,7 +1007,7 @@ bool video_thread_init(void)
{ {
intptr_t rep; intptr_t rep;
IF_COP(rb->cpucache_flush()); IF_COP(rb->commit_dcache());
video_str.hdr.q = &video_str_queue; video_str.hdr.q = &video_str_queue;
rb->queue_init(video_str.hdr.q, false); rb->queue_init(video_str.hdr.q, false);
@ -1025,7 +1025,7 @@ bool video_thread_init(void)
/* Wait for thread to initialize */ /* Wait for thread to initialize */
rep = str_send_msg(&video_str, STREAM_NULL, 0); rep = str_send_msg(&video_str, STREAM_NULL, 0);
IF_COP(rb->cpucache_invalidate()); IF_COP(rb->commit_discard_dcache());
return rep == 0; /* Normally STREAM_NULL should be ignored */ return rep == 0; /* Normally STREAM_NULL should be ignored */
} }
@ -1037,7 +1037,7 @@ void video_thread_exit(void)
{ {
str_post_msg(&video_str, STREAM_QUIT, 0); str_post_msg(&video_str, STREAM_QUIT, 0);
rb->thread_wait(video_str.thread); rb->thread_wait(video_str.thread);
IF_COP(rb->cpucache_invalidate()); IF_COP(rb->commit_discard_dcache());
video_str.thread = 0; video_str.thread = 0;
} }
} }

8
apps/plugins/plugin_crt0.c
View file

@ -76,10 +76,8 @@ enum plugin_status plugin__start(const void *param)
rb->audio_stop(); rb->audio_stop();
rb->memcpy(iramstart, iramcopy, iram_size); rb->memcpy(iramstart, iramcopy, iram_size);
rb->memset(iedata, 0, ibss_size); rb->memset(iedata, 0, ibss_size);
#ifdef HAVE_CPUCACHE_INVALIDATE
/* make the icache (if it exists) up to date with the new code */ /* make the icache (if it exists) up to date with the new code */
rb->cpucache_invalidate(); rb->commit_discard_idcache();
#endif /* HAVE_CPUCACHE_INVALIDATE */
/* barrier to prevent reordering iram copy and BSS clearing, /* barrier to prevent reordering iram copy and BSS clearing,
* because the BSS segment alias the IRAM copy. * because the BSS segment alias the IRAM copy.
@ -91,12 +89,10 @@ enum plugin_status plugin__start(const void *param)
/* zero out the bss section */ /* zero out the bss section */
rb->memset(plugin_bss_start, 0, plugin_end_addr - plugin_bss_start); rb->memset(plugin_bss_start, 0, plugin_end_addr - plugin_bss_start);
#ifdef HAVE_CPUCACHE_INVALIDATE
/* Some parts of bss may be used via a no-cache alias (at least /* Some parts of bss may be used via a no-cache alias (at least
* portalplayer has this). If we don't clear the cache, those aliases * portalplayer has this). If we don't clear the cache, those aliases
* may read garbage */ * may read garbage */
rb->cpucache_invalidate(); rb->commit_dcache();
#endif /* HAVE_CPUCACHE_INVALIDATE */
#endif #endif
/* we come back here if exit() was called or the plugin returned normally */ /* we come back here if exit() was called or the plugin returned normally */

2
bootloader/gigabeat-s.c
View file

@ -324,7 +324,7 @@ static void NORETURN_ATTR handle_firmware_load(void)
if (rc == EOK) if (rc == EOK)
{ {
cpucache_commit_discard(); commit_discard_idcache();
asm volatile ("bx %0": : "r"(start_addr)); asm volatile ("bx %0": : "r"(start_addr));
} }

4
bootloader/gigabeat.c
View file

@ -195,7 +195,7 @@ void main(void)
printf("Loading firmware"); printf("Loading firmware");
/* Flush out anything pending first */ /* Flush out anything pending first */
cpucache_invalidate(); commit_discard_idcache();
loadbuffer = (unsigned char*) 0x31000000; loadbuffer = (unsigned char*) 0x31000000;
buffer_size = (unsigned char*)0x31400000 - loadbuffer; buffer_size = (unsigned char*)0x31400000 - loadbuffer;
@ -209,7 +209,7 @@ void main(void)
if (rc == EOK) if (rc == EOK)
{ {
cpucache_invalidate(); commit_discard_idcache();
kernel_entry = (void*) loadbuffer; kernel_entry = (void*) loadbuffer;
rc = kernel_entry(); rc = kernel_entry();
} }

2
firmware/export/load_code.h
View file

@ -35,7 +35,7 @@ static inline void *lc_open_from_mem(void* addr, size_t blob_size)
{ {
(void)blob_size; (void)blob_size;
/* commit dcache and discard icache */ /* commit dcache and discard icache */
cpucache_invalidate(); commit_discard_idcache();
return addr; return addr;
} }
static inline void *lc_get_header(void *handle) { return handle; } static inline void *lc_get_header(void *handle) { return handle; }

29
firmware/export/system.h
View file

@ -302,35 +302,6 @@ static inline uint32_t swaw32_hw(uint32_t value)
#define DISABLE_INTERRUPTS HIGHEST_IRQ_LEVEL #define DISABLE_INTERRUPTS HIGHEST_IRQ_LEVEL
#endif #endif
/* Just define these as empty if not declared */
#ifdef HAVE_CPUCACHE_INVALIDATE
void cpucache_commit_discard(void);
/* deprecated alias */
void cpucache_invalidate(void);
#else
static inline void cpucache_commit_discard(void)
{
}
/* deprecated alias */
static inline void cpucache_invalidate(void)
{
}
#endif
#ifdef HAVE_CPUCACHE_FLUSH
void cpucache_commit(void);
/* deprecated alias */
void cpucache_flush(void);
#else
static inline void cpucache_commit(void)
{
}
/* deprecated alias */
static inline void cpucache_flush(void)
{
}
#endif
/* Define this, if the CPU may take advantage of cache aligment. Is enabled /* Define this, if the CPU may take advantage of cache aligment. Is enabled
* for all ARM CPUs. */ * for all ARM CPUs. */
#ifdef CPU_ARM #ifdef CPU_ARM

3
firmware/load_code.c
View file

@ -46,7 +46,6 @@ void * lc_open(const char *filename, unsigned char *buf, size_t buf_size)
/* Make sure COP cache is flushed and invalidated before loading */ /* Make sure COP cache is flushed and invalidated before loading */
{ {
int my_core = switch_core(CURRENT_CORE ^ 1); int my_core = switch_core(CURRENT_CORE ^ 1);
cpucache_commit_discard();
switch_core(my_core); switch_core(my_core);
} }
#endif #endif
@ -89,7 +88,7 @@ void * lc_open(const char *filename, unsigned char *buf, size_t buf_size)
} }
/* commit dcache and discard icache */ /* commit dcache and discard icache */
cpucache_commit_discard(); commit_discard_idcache();
/* return a pointer the header, reused by lc_get_header() */ /* return a pointer the header, reused by lc_get_header() */
return hdr.load_addr; return hdr.load_addr;

8
firmware/rolo.c
View file

@ -75,7 +75,7 @@ void rolo_restart_cop(void)
COP_INT_DIS = -1; COP_INT_DIS = -1;
/* Invalidate cache */ /* Invalidate cache */
cpucache_invalidate(); commit_discard_idcache();
/* Disable cache */ /* Disable cache */
CACHE_CTL = CACHE_CTL_DISABLE; CACHE_CTL = CACHE_CTL_DISABLE;
@ -148,7 +148,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
CPU_INT_DIS = -1; CPU_INT_DIS = -1;
/* Flush cache */ /* Flush cache */
cpucache_flush(); commit_discard_idcache();
/* Disable cache */ /* Disable cache */
CACHE_CTL = CACHE_CTL_DISABLE; CACHE_CTL = CACHE_CTL_DISABLE;
@ -174,10 +174,8 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
); );
#elif defined(CPU_ARM) #elif defined(CPU_ARM)
#ifdef HAVE_CPUCACHE_INVALIDATE
/* Flush and invalidate caches */ /* Flush and invalidate caches */
cpucache_invalidate(); commit_discard_idcache();
#endif
asm volatile( asm volatile(
"bx %0 \n" "bx %0 \n"
: : "r"(dest) : : "r"(dest)

4
firmware/target/arm/as3525/pcm-as3525.c
View file

@ -109,7 +109,7 @@ static void dma_callback(void)
dma_rem_size = dma_start_size; dma_rem_size = dma_start_size;
/* force writeback */ /* force writeback */
clean_dcache_range(dma_start_addr, dma_start_size); commit_dcache_range(dma_start_addr, dma_start_size);
play_start_pcm(); play_start_pcm();
pcm_play_dma_started_callback(); pcm_play_dma_started_callback();
} }
@ -131,7 +131,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
dma_retain(); dma_retain();
/* force writeback */ /* force writeback */
clean_dcache_range(dma_start_addr, dma_start_size); commit_dcache_range(dma_start_addr, dma_start_size);
bitset32(&CGU_AUDIO, (1<<11)); bitset32(&CGU_AUDIO, (1<<11));

6
firmware/target/arm/as3525/usb-drv-as3525.c
View file

@ -432,7 +432,7 @@ int usb_drv_recv(int ep, void *ptr, int len)
endpoints[ep][1].rc = -1; endpoints[ep][1].rc = -1;
/* remove data buffer from cache */ /* remove data buffer from cache */
invalidate_dcache_range(ptr, len); discard_dcache_range(ptr, len);
/* DMA setup */ /* DMA setup */
uc_desc->status = USB_DMA_DESC_BS_HST_RDY | uc_desc->status = USB_DMA_DESC_BS_HST_RDY |
@ -509,7 +509,7 @@ static void ep_send(int ep, void *ptr, int len)
USB_IEP_CTRL(ep) |= USB_EP_CTRL_FLUSH; USB_IEP_CTRL(ep) |= USB_EP_CTRL_FLUSH;
/* Make sure data is committed to memory */ /* Make sure data is committed to memory */
clean_dcache_range(ptr, len); commit_dcache_range(ptr, len);
logf("xx%s\n", make_hex(ptr, len)); logf("xx%s\n", make_hex(ptr, len));
@ -625,7 +625,7 @@ static void handle_out_ep(int ep)
/* /*
* If parts of the just dmaed range are in cache, dump them now. * If parts of the just dmaed range are in cache, dump them now.
*/ */
dump_dcache_range(uc_desc->data_ptr, dma_len); discard_dcache_range(uc_desc->data_ptr, dma_len);
} else{ } else{
logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep, logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep,
dma_sts & 0xf8000000, (dma_sts >> 16) & 0x7ff); dma_sts & 0xf8000000, (dma_sts >> 16) & 0x7ff);

4
firmware/target/arm/as3525/usb-drv-as3525v2.c
View file

@ -449,9 +449,9 @@ static void usb_drv_transfer(int ep, void *ptr, int len, bool out)
: (void*)0x10000000; : (void*)0x10000000;
DEPTSIZ(ep, out) = (nb_packets << DEPTSIZ_pkcnt_bitp) | len; DEPTSIZ(ep, out) = (nb_packets << DEPTSIZ_pkcnt_bitp) | len;
if(out) if(out)
dump_dcache_range(ptr, len); discard_dcache_range(ptr, len);
else else
clean_dcache_range(ptr, len); commit_dcache_range(ptr, len);
logf("pkt=%d dma=%lx", nb_packets, DEPDMA(ep, out)); logf("pkt=%d dma=%lx", nb_packets, DEPDMA(ep, out));

4
firmware/target/arm/ata-pp5020.c
View file

@ -181,11 +181,11 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write) {
if (write) { if (write) {
/* If unflushed, old data may be written to disk */ /* If unflushed, old data may be written to disk */
cpucache_flush(); commit_dcache();
} }
else { else {
/* Invalidate cache because new data may be present in RAM */ /* Invalidate cache because new data may be present in RAM */
cpucache_invalidate(); commit_discard_dcache();
} }
/* Clear pending interrupts so ata_dma_finish() can wait for an /* Clear pending interrupts so ata_dma_finish() can wait for an

4
firmware/target/arm/imx31/ata-imx31.c
View file

@ -475,7 +475,7 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write)
if (LIKELY(buf != addr)) if (LIKELY(buf != addr))
{ {
/* addr is virtual */ /* addr is virtual */
clean_dcache_range(addr, bytes); commit_dcache_range(addr, bytes);
} }
/* Setup ATA controller for DMA transmit */ /* Setup ATA controller for DMA transmit */
@ -495,7 +495,7 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write)
if (LIKELY(buf != addr)) if (LIKELY(buf != addr))
{ {
/* addr is virtual */ /* addr is virtual */
dump_dcache_range(addr, bytes); discard_dcache_range(addr, bytes);
if ((unsigned long)addr & 31) if ((unsigned long)addr & 31)
{ {

2
firmware/target/arm/imx31/crt0.S
View file

@ -301,7 +301,7 @@ remap_end:
#endif #endif
/* Make memory coherent for devices */ /* Make memory coherent for devices */
bl cpucache_commit_discard bl commit_discard_idcache
bl main bl main

12
firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c
View file

@ -99,7 +99,7 @@ static void play_dma_callback(void)
return; return;
/* Flush any pending cache writes */ /* Flush any pending cache writes */
clean_dcache_range(start, size); commit_dcache_range(start, size);
dma_play_bd.buf_addr = (void *)addr_virt_to_phys((unsigned long)start); dma_play_bd.buf_addr = (void *)addr_virt_to_phys((unsigned long)start);
dma_play_bd.mode.count = size; dma_play_bd.mode.count = size;
dma_play_bd.mode.command = TRANSFER_16BIT; dma_play_bd.mode.command = TRANSFER_16BIT;
@ -202,7 +202,7 @@ static void play_stop_pcm(void)
unsigned long dsa = 0; unsigned long dsa = 0;
dma_play_bd.buf_addr = NULL; dma_play_bd.buf_addr = NULL;
dma_play_bd.mode.count = 0; dma_play_bd.mode.count = 0;
clean_dcache_range(&dsa, sizeof(dsa)); discard_dcache_range(&dsa, sizeof(dsa));
sdma_write_words(&dsa, CHANNEL_CONTEXT_ADDR(DMA_PLAY_CH_NUM)+0x0b, 1); sdma_write_words(&dsa, CHANNEL_CONTEXT_ADDR(DMA_PLAY_CH_NUM)+0x0b, 1);
} }
@ -221,7 +221,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
if (!sdma_channel_reset(DMA_PLAY_CH_NUM)) if (!sdma_channel_reset(DMA_PLAY_CH_NUM))
return; return;
clean_dcache_range(addr, size); commit_dcache_range(addr, size);
dma_play_bd.buf_addr = dma_play_bd.buf_addr =
(void *)addr_virt_to_phys((unsigned long)(void *)addr); (void *)addr_virt_to_phys((unsigned long)(void *)addr);
dma_play_bd.mode.count = size; dma_play_bd.mode.count = size;
@ -353,7 +353,7 @@ static void rec_dma_callback(void)
return; return;
/* Invalidate - buffer must be coherent */ /* Invalidate - buffer must be coherent */
dump_dcache_range(start, size); discard_dcache_range(start, size);
start = (void *)addr_virt_to_phys((unsigned long)start); start = (void *)addr_virt_to_phys((unsigned long)start);
@ -412,7 +412,7 @@ void pcm_rec_dma_stop(void)
unsigned long pda = 0; unsigned long pda = 0;
dma_rec_bd.buf_addr = NULL; dma_rec_bd.buf_addr = NULL;
dma_rec_bd.mode.count = 0; dma_rec_bd.mode.count = 0;
clean_dcache_range(&pda, sizeof(pda)); discard_dcache_range(&pda, sizeof(pda));
sdma_write_words(&pda, CHANNEL_CONTEXT_ADDR(DMA_REC_CH_NUM)+0x0a, 1); sdma_write_words(&pda, CHANNEL_CONTEXT_ADDR(DMA_REC_CH_NUM)+0x0a, 1);
} }
@ -428,7 +428,7 @@ void pcm_rec_dma_start(void *addr, size_t size)
return; return;
/* Invalidate - buffer must be coherent */ /* Invalidate - buffer must be coherent */
dump_dcache_range(addr, size); discard_dcache_range(addr, size);
addr = (void *)addr_virt_to_phys((unsigned long)addr); addr = (void *)addr_virt_to_phys((unsigned long)addr);
dma_rec_bd.buf_addr = addr; dma_rec_bd.buf_addr = addr;

2
firmware/target/arm/imx31/sdma-imx31.c
View file

@ -382,7 +382,7 @@ static bool setup_channel(struct channel_control_block *ccb_p)
} }
/* Send channel context to SDMA core */ /* Send channel context to SDMA core */
clean_dcache_range(&context_buffer, sizeof (context_buffer)); commit_dcache_range(&context_buffer, sizeof (context_buffer));
sdma_write_words((unsigned long *)&context_buffer, sdma_write_words((unsigned long *)&context_buffer,
CHANNEL_CONTEXT_ADDR(channel), CHANNEL_CONTEXT_ADDR(channel),
sizeof (context_buffer)/4); sizeof (context_buffer)/4);

20
firmware/target/arm/mmu-arm.S
View file

@ -184,11 +184,9 @@ enable_mmu:
.align 2 .align 2
.global commit_discard_dcache_range .global commit_discard_dcache_range
.type commit_discard_dcache_range, %function .type commit_discard_dcache_range, %function
.global invalidate_dcache_range @ Alias, deprecated
@ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ
commit_discard_dcache_range: commit_discard_dcache_range:
invalidate_dcache_range:
add r1, r0, r1 @ size -> end add r1, r0, r1 @ size -> end
cmp r1, r0 @ end <= start? cmp r1, r0 @ end <= start?
bxls lr @ bxls lr @
@ -232,11 +230,9 @@ invalidate_dcache_range:
.align 2 .align 2
.global commit_dcache_range .global commit_dcache_range
.type commit_dcache_range, %function .type commit_dcache_range, %function
.global clean_dcache_range @ Alias, deprecated
@ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ
commit_dcache_range: commit_dcache_range:
clean_dcache_range:
add r1, r0, r1 @ size -> end add r1, r0, r1 @ size -> end
cmp r1, r0 @ end <= start? cmp r1, r0 @ end <= start?
bxls lr @ bxls lr @
@ -281,11 +277,9 @@ clean_dcache_range:
.align 2 .align 2
.global discard_dcache_range .global discard_dcache_range
.type discard_dcache_range, %function .type discard_dcache_range, %function
.global dump_dcache_range @ Alias, deprecated
@ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ
discard_dcache_range: discard_dcache_range:
dump_dcache_range:
add r1, r0, r1 @ size -> end add r1, r0, r1 @ size -> end
cmp r1, r0 @ end <= start? cmp r1, r0 @ end <= start?
bxls lr @ bxls lr @
@ -339,14 +333,8 @@ dump_dcache_range:
.align 2 .align 2
.global commit_dcache .global commit_dcache
.type commit_dcache, %function .type commit_dcache, %function
.global cpucache_commit @ Alias
.global clean_dcache @ Alias, deprecated
.global cpucache_flush @ Alias, deprecated
commit_dcache: commit_dcache:
cpucache_commit:
clean_dcache:
cpucache_flush:
#ifdef HAVE_TEST_AND_CLEAN_CACHE #ifdef HAVE_TEST_AND_CLEAN_CACHE
mrc p15, 0, r15, c7, c10, 3 @ test and clean dcache mrc p15, 0, r15, c7, c10, 3 @ test and clean dcache
bne commit_dcache bne commit_dcache
@ -376,10 +364,8 @@ cpucache_flush:
.align 2 .align 2
.global commit_discard_dcache .global commit_discard_dcache
.type commit_discard_dcache, %function .type commit_discard_dcache, %function
.global invalidate_dcache @ Alias, deprecated
commit_discard_dcache: commit_discard_dcache:
invalidate_dcache:
#ifdef HAVE_TEST_AND_CLEAN_CACHE #ifdef HAVE_TEST_AND_CLEAN_CACHE
mrc p15, 0, r15, c7, c14, 3 @ test, clean and invalidate dcache mrc p15, 0, r15, c7, c14, 3 @ test, clean and invalidate dcache
bne commit_discard_dcache bne commit_discard_dcache
@ -409,14 +395,8 @@ invalidate_dcache:
.align 2 .align 2
.global commit_discard_idcache .global commit_discard_idcache
.type commit_discard_idcache, %function .type commit_discard_idcache, %function
.global cpucache_commit_discard @ Alias
.global invalidate_idcache @ Alias, deprecated
.global cpucache_invalidate @ Alias, deprecated
commit_discard_idcache: commit_discard_idcache:
cpucache_commit_discard:
invalidate_idcache:
cpucache_invalidate:
mov r2, lr @ save lr to r1, call uses r0 only mov r2, lr @ save lr to r1, call uses r0 only
bl commit_discard_dcache @ commit and discard entire DCache bl commit_discard_dcache @ commit and discard entire DCache
mcr p15, 0, r1, c7, c5, 0 @ Invalidate ICache (r1=0 from call) mcr p15, 0, r1, c7, c5, 0 @ Invalidate ICache (r1=0 from call)

18
firmware/target/arm/mmu-arm.h
View file

@ -53,42 +53,24 @@ void map_section(unsigned int pa, unsigned int va, int mb, int flags);
/* Commits entire DCache */ /* Commits entire DCache */
void commit_dcache(void); void commit_dcache(void);
/* deprecated alias */
void clean_dcache(void);
/* Commit and discard entire DCache, will do writeback */ /* Commit and discard entire DCache, will do writeback */
void commit_discard_dcache(void); void commit_discard_dcache(void);
/* deprecated alias */
void invalidate_dcache(void);
/* Write DCache back to RAM for the given range and remove cache lines /* Write DCache back to RAM for the given range and remove cache lines
* from DCache afterwards */ * from DCache afterwards */
void commit_discard_dcache_range(const void *base, unsigned int size); void commit_discard_dcache_range(const void *base, unsigned int size);
/* deprecated alias */
void invalidate_dcache_range(const void *base, unsigned int size);
/* Write DCache back to RAM for the given range */ /* Write DCache back to RAM for the given range */
void commit_dcache_range(const void *base, unsigned int size); void commit_dcache_range(const void *base, unsigned int size);
/* deprecated alias */
void clean_dcache_range(const void *base, unsigned int size);
/* /*
* Remove cache lines for the given range from DCache * Remove cache lines for the given range from DCache
* will *NOT* do write back except for buffer edges not on a line boundary * will *NOT* do write back except for buffer edges not on a line boundary
*/ */
void discard_dcache_range(const void *base, unsigned int size); void discard_dcache_range(const void *base, unsigned int size);
/* deprecated alias */
void dump_dcache_range(const void *base, unsigned int size);
/* Discards the entire ICache, and commit+discards the entire DCache */ /* Discards the entire ICache, and commit+discards the entire DCache */
void commit_discard_idcache(void); void commit_discard_idcache(void);
/* deprecated alias */
void invalidate_idcache(void);
#define HAVE_CPUCACHE_COMMIT_DISCARD
#define HAVE_CPUCACHE_COMMIT
/* deprecated alias */
#define HAVE_CPUCACHE_INVALIDATE
#define HAVE_CPUCACHE_FLUSH
#endif /* MMU_ARM_H */ #endif /* MMU_ARM_H */

28
firmware/target/arm/mmu-armv6.S
View file

@ -36,11 +36,9 @@
.align 2 .align 2
.global commit_discard_dcache_range .global commit_discard_dcache_range
.type commit_discard_dcache_range, %function .type commit_discard_dcache_range, %function
.global invalidate_dcache_range @ Alias, deprecated
@ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ
commit_discard_dcache_range: commit_discard_dcache_range:
invalidate_dcache_range:
add r1, r0, r1 @ size -> end add r1, r0, r1 @ size -> end
cmp r1, r0 @ end <= start? cmp r1, r0 @ end <= start?
subhi r1, r1, #1 @ round it down subhi r1, r1, #1 @ round it down
@ -60,11 +58,9 @@ invalidate_dcache_range:
.align 2 .align 2
.global commit_dcache_range .global commit_dcache_range
.type commit_dcache_range, %function .type commit_dcache_range, %function
.global clean_dcache_range @ Alias, deprecated
@ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ
commit_dcache_range: commit_dcache_range:
clean_dcache_range:
add r1, r0, r1 @ size -> end add r1, r0, r1 @ size -> end
cmp r1, r0 @ end <= start? cmp r1, r0 @ end <= start?
subhi r1, r1, #1 @ round it down subhi r1, r1, #1 @ round it down
@ -83,11 +79,9 @@ clean_dcache_range:
.align 2 .align 2
.global discard_dcache_range .global discard_dcache_range
.type discard_dcache_range, %function .type discard_dcache_range, %function
.global dump_dcache_range @ Alias, deprecated
@ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ
discard_dcache_range: discard_dcache_range:
dump_dcache_range:
add r1, r0, r1 @ size -> end add r1, r0, r1 @ size -> end
cmp r1, r0 @ end <= start? cmp r1, r0 @ end <= start?
bxls lr @ bxls lr @
@ -118,14 +112,8 @@ dump_dcache_range:
.align 2 .align 2
.global commit_dcache .global commit_dcache
.type commit_dcache, %function .type commit_dcache, %function
.global cpucache_commit @ Alias
.global clean_dcache @ Alias, deprecated
.global cpucache_flush @ Alias, deprecated
commit_dcache: commit_dcache:
cpucache_commit:
clean_dcache:
cpucache_flush:
mov r0, #0 @ mov r0, #0 @
mcr p15, 0, r0, c7, c10, 0 @ Clean entire DCache mcr p15, 0, r0, c7, c10, 0 @ Clean entire DCache
mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
@ -140,10 +128,8 @@ cpucache_flush:
.align 2 .align 2
.global commit_discard_dcache .global commit_discard_dcache
.type commit_discard_dcache, %function .type commit_discard_dcache, %function
.global invalidate_dcache @ Alias, deprecated
commit_discard_dcache: commit_discard_dcache:
invalidate_dcache:
mov r0, #0 @ mov r0, #0 @
mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache
mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
@ -153,20 +139,14 @@ invalidate_dcache:
/* /*
* Discards the entire ICache, and commit+discards the entire DCache * Discards the entire ICache, and commit+discards the entire DCache
* void cpucache_commit_discard(void); * void commit_discard_idcache(void);
*/ */
.section .icode.cpucache_commit_discard, "ax", %progbits .section .icode.commit_discard_idcache, "ax", %progbits
.align 2 .align 2
.global cpucache_commit_discard .global commit_discard_idcache
.type cpucache_commit_discard, %function .type commit_discard_idcache, %function
.global commit_discard_idcache @ Alias
.global invalidate_idcache @ Alias, deprecated
.global cpucache_invalidate @ Alias, deprecated
cpucache_commit_discard:
commit_discard_idcache: commit_discard_idcache:
invalidate_idcache:
cpucache_invalidate:
mov r0, #0 @ mov r0, #0 @
mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache
mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire ICache mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire ICache

4
firmware/target/arm/pcm-pp.c
View file

@ -158,7 +158,7 @@ void ICODE_ATTR __attribute__((interrupt("FIQ"))) fiq_playback(void)
if (dma_play_data.addr < UNCACHED_BASE_ADDR) { if (dma_play_data.addr < UNCACHED_BASE_ADDR) {
/* Flush any pending cache writes */ /* Flush any pending cache writes */
dma_play_data.addr = UNCACHED_ADDR(dma_play_data.addr); dma_play_data.addr = UNCACHED_ADDR(dma_play_data.addr);
cpucache_flush(); commit_discard_idcache();
} }
} }
} }
@ -444,7 +444,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
if ((unsigned long)addr < UNCACHED_BASE_ADDR) { if ((unsigned long)addr < UNCACHED_BASE_ADDR) {
/* Flush any pending cache writes */ /* Flush any pending cache writes */
addr = UNCACHED_ADDR(addr); addr = UNCACHED_ADDR(addr);
cpucache_flush(); commit_discard_idcache();
} }
dma_play_data.addr = (unsigned long)addr; dma_play_data.addr = (unsigned long)addr;

7
firmware/target/arm/rk27xx/system-rk27xx.c
View file

@ -163,7 +163,7 @@ void udelay(unsigned usecs)
); );
} }
void cpucache_commit_discard(void) void commit_discard_idcache(void)
{ {
/* invalidate cache way 0 */ /* invalidate cache way 0 */
CACHEOP = 0x02; CACHEOP = 0x02;
@ -178,8 +178,6 @@ void cpucache_commit_discard(void)
while (CACHEOP & 0x03); while (CACHEOP & 0x03);
} }
void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard")));
void commit_discard_dcache_range (const void *base, unsigned int size) void commit_discard_dcache_range (const void *base, unsigned int size)
{ {
int cnt = size + ((unsigned long)base & 0x1f); int cnt = size + ((unsigned long)base & 0x1f);
@ -196,4 +194,5 @@ void commit_discard_dcache_range (const void *base, unsigned int size)
} }
} }
void clean_dcache_range(const void *base, unsigned int size) __attribute__((alias("commit_discard_dcache_range"))); void commit_dcache_range(const void *base, unsigned int size)
__attribute__((alias("commit_discard_dcache_range")));

4
firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c
View file

@ -121,7 +121,8 @@ void copy_read_sectors(unsigned char* buf, int wordcount)
/* Activate the channel */ /* Activate the channel */
DMASKTRIG0 = 0x2; DMASKTRIG0 = 0x2;
invalidate_dcache_range((void *)buf, wordcount*2); /* Dump cache for the buffer */
discard_dcache_range((void *)buf, wordcount*2);
/* Start DMA */ /* Start DMA */
DMASKTRIG0 |= 0x1; DMASKTRIG0 |= 0x1;
@ -129,6 +130,5 @@ void copy_read_sectors(unsigned char* buf, int wordcount)
/* Wait for transfer to complete */ /* Wait for transfer to complete */
while((DSTAT0 & 0x000fffff)) while((DSTAT0 & 0x000fffff))
yield(); yield();
/* Dump cache for the buffer */
} }
#endif #endif

4
firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
View file

@ -111,7 +111,7 @@ static void play_start_pcm(void)
SRCPND = DMA2_MASK; SRCPND = DMA2_MASK;
/* Flush any pending writes */ /* Flush any pending writes */
clean_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); commit_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2);
/* unmask DMA interrupt when unlocking */ /* unmask DMA interrupt when unlocking */
dma_play_lock.state = DMA2_MASK; dma_play_lock.state = DMA2_MASK;
@ -228,7 +228,7 @@ void fiq_handler(void)
return; return;
/* Flush any pending cache writes */ /* Flush any pending cache writes */
clean_dcache_range(start, size); commit_dcache_range(start, size);
/* set the new DMA values */ /* set the new DMA values */
DCON2 = DMA_CONTROL_SETUP | (size >> 1); DCON2 = DMA_CONTROL_SETUP | (size >> 1);

4
firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c
View file

@ -146,7 +146,7 @@ static void play_start_pcm(void)
SRCPND = DMA2_MASK; SRCPND = DMA2_MASK;
/* Flush any pending writes */ /* Flush any pending writes */
clean_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); commit_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2);
/* unmask DMA interrupt when unlocking */ /* unmask DMA interrupt when unlocking */
dma_play_lock.state = DMA2_MASK; dma_play_lock.state = DMA2_MASK;
@ -268,7 +268,7 @@ void fiq_handler(void)
return; return;
/* Flush any pending cache writes */ /* Flush any pending cache writes */
clean_dcache_range(start, size); commit_dcache_range(start, size);
/* set the new DMA values */ /* set the new DMA values */
DCON2 = DMA_CONTROL_SETUP | (size >> 1); DCON2 = DMA_CONTROL_SETUP | (size >> 1);

15
firmware/target/arm/system-pp5002.c
View file

@ -54,15 +54,8 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void)
#endif #endif
/* TODO: The following two function have been lifted straight from IPL, and
hence have a lot of numeric addresses used straight. I'd like to use
#defines for these, but don't know what most of them are for or even what
they should be named. Because of this I also have no way of knowing how
to extend the funtions to do alternate cache configurations and/or
some other CPU frequency scaling. */
#ifndef BOOTLOADER #ifndef BOOTLOADER
void ICODE_ATTR __attribute__((naked)) cpucache_commit(void) void ICODE_ATTR __attribute__((naked)) commit_dcache(void)
{ {
asm volatile( asm volatile(
"mov r0, #0xf0000000 \n" "mov r0, #0xf0000000 \n"
@ -76,9 +69,8 @@ void ICODE_ATTR __attribute__((naked)) cpucache_commit(void)
"bx lr \n" "bx lr \n"
); );
} }
void cpucache_flush(void) __attribute__((alias("cpucache_commit")));
void ICODE_ATTR __attribute__((naked)) cpucache_commit_discard(void) void ICODE_ATTR __attribute__((naked)) commit_discard_idcache(void)
{ {
asm volatile( asm volatile(
"mov r0, #0xf0000000 \n" "mov r0, #0xf0000000 \n"
@ -94,7 +86,8 @@ void ICODE_ATTR __attribute__((naked)) cpucache_commit_discard(void)
"bx lr \n" "bx lr \n"
); );
} }
void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard")));
void commit_discard_dcache(void) __attribute__((alias("commit_discard_idcache")));
static void ipod_init_cache(void) static void ipod_init_cache(void)
{ {

8
firmware/target/arm/system-pp502x.c
View file

@ -209,7 +209,7 @@ static void disable_all_interrupts(void)
GPIOL_INT_EN = 0; GPIOL_INT_EN = 0;
} }
void ICODE_ATTR cpucache_commit(void) void ICODE_ATTR commit_dcache(void)
{ {
if (CACHE_CTL & CACHE_CTL_ENABLE) if (CACHE_CTL & CACHE_CTL_ENABLE)
{ {
@ -218,9 +218,8 @@ void ICODE_ATTR cpucache_commit(void)
nop; nop; nop; nop; nop; nop; nop; nop;
} }
} }
void cpucache_flush(void) __attribute__((alias("cpucache_commit")));
void ICODE_ATTR cpucache_commit_discard(void) void ICODE_ATTR commit_discard_idcache(void)
{ {
if (CACHE_CTL & CACHE_CTL_ENABLE) if (CACHE_CTL & CACHE_CTL_ENABLE)
{ {
@ -229,7 +228,8 @@ void ICODE_ATTR cpucache_commit_discard(void)
nop; nop; nop; nop; nop; nop; nop; nop;
} }
} }
void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard")));
void commit_discard_dcache(void) __attribute__((alias("commit_discard_idcache")));
static void init_cache(void) static void init_cache(void)
{ {

13
firmware/target/arm/system-target.h
View file

@ -141,6 +141,10 @@ static inline void wake_core(int core)
} }
#endif #endif
void commit_dcache(void);
void commit_discard_dcache(void);
void commit_discard_idcache(void);
#if defined(BOOTLOADER) && !defined(HAVE_BOOTLOADER_USB_MODE) #if defined(BOOTLOADER) && !defined(HAVE_BOOTLOADER_USB_MODE)
/* All addresses within rockbox are in IRAM in the bootloader so /* All addresses within rockbox are in IRAM in the bootloader so
are therefore uncached */ are therefore uncached */
@ -162,15 +166,6 @@ static inline void wake_core(int core)
#define STORAGE_WANTS_ALIGN #define STORAGE_WANTS_ALIGN
#endif #endif
/** cache functions **/
#if !defined(BOOTLOADER) || defined(HAVE_BOOTLOADER_USB_MODE)
#define HAVE_CPUCACHE_COMMIT_DISCARD
#define HAVE_CPUCACHE_COMMIT
/* deprecated alias */
#define HAVE_CPUCACHE_INVALIDATE
#define HAVE_CPUCACHE_FLUSH
#endif
#if defined(IPOD_VIDEO) && !defined(BOOTLOADER) #if defined(IPOD_VIDEO) && !defined(BOOTLOADER)
extern unsigned char probed_ramsize; extern unsigned char probed_ramsize;
int battery_default_capacity(void); int battery_default_capacity(void);

2
firmware/target/arm/thread-arm.c
View file

@ -34,7 +34,7 @@ static void __attribute__((naked)) USED_ATTR start_thread(void)
"mov r1, #0 \n" /* Mark thread as running */ "mov r1, #0 \n" /* Mark thread as running */
"str r1, [r0, #40] \n" "str r1, [r0, #40] \n"
#if NUM_CORES > 1 #if NUM_CORES > 1
"ldr r0, =cpucache_invalidate \n" /* Invalidate this core's cache. */ "ldr r0, =commit_discard_idcache \n" /* Invalidate this core's cache. */
"mov lr, pc \n" /* This could be the first entry into */ "mov lr, pc \n" /* This could be the first entry into */
"bx r0 \n" /* plugin or codec code for this core. */ "bx r0 \n" /* plugin or codec code for this core. */
#endif #endif

6
firmware/target/arm/thread-pp.c
View file

@ -214,7 +214,7 @@ static inline void NORETURN_ATTR __attribute__((always_inline))
{ {
asm volatile ( asm volatile (
"cmp %1, #0 \n" /* CPU? */ "cmp %1, #0 \n" /* CPU? */
"ldrne r0, =cpucache_flush \n" /* No? write back data */ "ldrne r0, =commit_dcache \n" /* No? write back data */
"movne lr, pc \n" "movne lr, pc \n"
"bxne r0 \n" "bxne r0 \n"
"mov r0, %0 \n" /* copy thread parameter */ "mov r0, %0 \n" /* copy thread parameter */
@ -244,7 +244,7 @@ static inline void NORETURN_ATTR __attribute__((always_inline))
static void core_switch_blk_op(unsigned int core, struct thread_entry *thread) static void core_switch_blk_op(unsigned int core, struct thread_entry *thread)
{ {
/* Flush our data to ram */ /* Flush our data to ram */
cpucache_flush(); commit_dcache();
/* Stash thread in r4 slot */ /* Stash thread in r4 slot */
thread->context.r[0] = (uint32_t)thread; thread->context.r[0] = (uint32_t)thread;
/* Stash restart address in r5 slot */ /* Stash restart address in r5 slot */
@ -285,7 +285,7 @@ static void __attribute__((naked))
"ldr sp, [r0, #32] \n" /* Reload original sp from context structure */ "ldr sp, [r0, #32] \n" /* Reload original sp from context structure */
"mov r1, #0 \n" /* Clear start address */ "mov r1, #0 \n" /* Clear start address */
"str r1, [r0, #40] \n" "str r1, [r0, #40] \n"
"ldr r0, =cpucache_invalidate \n" /* Invalidate new core's cache */ "ldr r0, =commit_discard_idcache \n" /* Invalidate new core's cache */
"mov lr, pc \n" "mov lr, pc \n"
"bx r0 \n" "bx r0 \n"
"ldmfd sp!, { r4-r11, pc } \n" /* Restore non-volatile context to new core and return */ "ldmfd sp!, { r4-r11, pc } \n" /* Restore non-volatile context to new core and return */

6
firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c
View file

@ -318,7 +318,7 @@ static void dma_start_transfer16( char *src, int src_x, int src_y, int stride,
dst = (char *)FRAME + (y * LCD_HEIGHT + x) * pix_width; dst = (char *)FRAME + (y * LCD_HEIGHT + x) * pix_width;
/* Flush the area that is being copied from. */ /* Flush the area that is being copied from. */
clean_dcache_range(src, (stride*pix_width*width)); commit_dcache_range(src, (stride*pix_width*width));
/* Addresses are relative to start of SDRAM */ /* Addresses are relative to start of SDRAM */
src -= CONFIG_SDRAM_START; src -= CONFIG_SDRAM_START;
@ -393,9 +393,9 @@ static void dma_start_transfer16( char *src, int src_x, int src_y, int stride,
* pix_width; * pix_width;
/* Flush the area that is being copied from. */ /* Flush the area that is being copied from. */
clean_dcache(); commit_dcache();
// clean_dcache_range(src, (stride*pix_width*width)); // commit_dcache_range(src, (stride*pix_width*width));
/* Addresses are relative to start of SDRAM */ /* Addresses are relative to start of SDRAM */
src -= CONFIG_SDRAM_START; src -= CONFIG_SDRAM_START;

2
firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c
View file

@ -170,7 +170,7 @@ void DSPHINT(void)
{ {
unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START; unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START;
/* Flush any pending cache writes */ /* Flush any pending cache writes */
clean_dcache_range(start, size); commit_dcache_range(start, size);
/* set the new DMA values */ /* set the new DMA values */
DSP_(_sdem_addrl) = sdem_addr & 0xffff; DSP_(_sdem_addrl) = sdem_addr & 0xffff;

2
firmware/target/arm/tms320dm320/sansa-connect/pcm-sansaconnect.c
View file

@ -180,7 +180,7 @@ void DSPHINT(void)
{ {
unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START; unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START;
/* Flush any pending cache writes */ /* Flush any pending cache writes */
clean_dcache_range(start, size); commit_dcache_range(start, size);
/* set the new DMA values */ /* set the new DMA values */
DSP_(_sdem_addrl) = sdem_addr & 0xffff; DSP_(_sdem_addrl) = sdem_addr & 0xffff;

4
firmware/target/coldfire/system-coldfire.c
View file

@ -384,12 +384,10 @@ void coldfire_set_dataincontrol(unsigned long value)
restore_irq(level); restore_irq(level);
} }
void cpucache_commit_discard(void) void commit_discard_idcache(void)
{ {
asm volatile ("move.l #0x01000000,%d0\n" asm volatile ("move.l #0x01000000,%d0\n"
"movec.l %d0,%cacr\n" "movec.l %d0,%cacr\n"
"move.l #0x80000000,%d0\n" "move.l #0x80000000,%d0\n"
"movec.l %d0,%cacr"); "movec.l %d0,%cacr");
} }
void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard")));

8
firmware/target/coldfire/system-target.h
View file

@ -194,10 +194,6 @@ static inline uint32_t swap_odd_even32_hw(uint32_t value)
return value; return value;
} }
#define HAVE_CPUCACHE_COMMIT_DISCARD
/* deprecated alias */
#define HAVE_CPUCACHE_INVALIDATE
#define DEFAULT_PLLCR_AUDIO_BITS 0x10400000 #define DEFAULT_PLLCR_AUDIO_BITS 0x10400000
void coldfire_set_pllcr_audio_bits(long bits); void coldfire_set_pllcr_audio_bits(long bits);
@ -223,4 +219,8 @@ extern void cf_set_cpu_frequency(long frequency);
#define CPUFREQ_MAX_MULT 11 #define CPUFREQ_MAX_MULT 11
#define CPUFREQ_MAX (CPUFREQ_MAX_MULT * CPU_FREQ) #define CPUFREQ_MAX (CPUFREQ_MAX_MULT * CPU_FREQ)
void commit_discard_idcache(void);
static inline void commit_discard_dcache(void) {}
static inline void commit_dcache(void) {}
#endif /* SYSTEM_TARGET_H */ #endif /* SYSTEM_TARGET_H */

4
firmware/target/hosted/android/system-target.h
View file

@ -26,6 +26,10 @@
#define disable_irq_save() 0 #define disable_irq_save() 0
#define restore_irq(level) (void)level #define restore_irq(level) (void)level
static inline void commit_dcache(void) {}
static inline void commit_discard_dcache(void) {}
static inline void commit_discard_idcache(void) {}
void power_off(void); void power_off(void);
void wait_for_interrupt(void); void wait_for_interrupt(void);
void interrupt(void); void interrupt(void);

4
firmware/target/hosted/sdl/system-sdl.h
View file

@ -57,4 +57,8 @@ extern bool showremote;
extern int display_zoom; extern int display_zoom;
extern long start_tick; extern long start_tick;
static inline void commit_dcache(void) {}
static inline void commit_discard_dcache(void) {}
static inline void commit_discard_idcache(void) {}
#endif /* _SYSTEM_SDL_H_ */ #endif /* _SYSTEM_SDL_H_ */

6
firmware/target/mips/mmu-mips.c
View file

@ -169,12 +169,6 @@ void __icache_invalidate_all(void)
: "r" (i)); : "r" (i));
} }
void cpucache_commit_discard(void)
{
__icache_invalidate_all();
}
void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard")));
void __dcache_invalidate_all(void) void __dcache_invalidate_all(void)
{ {
unsigned int i; unsigned int i;

4
firmware/target/mips/mmu-mips.h
View file

@ -37,4 +37,8 @@ void __icache_invalidate_all(void);
void __flush_dcache_line(unsigned long addr); void __flush_dcache_line(unsigned long addr);
void dma_cache_wback_inv(unsigned long addr, unsigned long size); void dma_cache_wback_inv(unsigned long addr, unsigned long size);
#define commit_discard_idcache __icache_invalidate_all
#define commit_discard_dcache __dcache_invalidate_all
#define commit_dcache __dcache_writeback_all
#endif /* __MMU_MIPS_INCLUDE_H */ #endif /* __MMU_MIPS_INCLUDE_H */

4
firmware/target/sh/system-target.h
View file

@ -133,4 +133,8 @@ extern const unsigned bit_n_table[32];
: bit_n_table[n] \ : bit_n_table[n] \
) )
static inline void commit_dcache(void) {}
static inline void commit_discard_dcache(void) {}
static inline void commit_discard_idcache(void) {}
#endif /* SYSTEM_TARGET_H */ #endif /* SYSTEM_TARGET_H */

2
firmware/thread.c
View file

@ -1613,7 +1613,7 @@ unsigned int create_thread(void (*function)(void),
/* Writeback stack munging or anything else before starting */ /* Writeback stack munging or anything else before starting */
if (core != CURRENT_CORE) if (core != CURRENT_CORE)
{ {
cpucache_flush(); commit_discard_idcache();
} }
#endif #endif

2
firmware/usbstack/usb_storage.c
View file

@ -474,7 +474,7 @@ void usb_storage_init_connection(void)
cbw_buffer = (void *)((unsigned int)(audio_buffer+31) & 0xffffffe0); cbw_buffer = (void *)((unsigned int)(audio_buffer+31) & 0xffffffe0);
#endif #endif
tb.transfer_buffer = cbw_buffer + MAX_CBW_SIZE; tb.transfer_buffer = cbw_buffer + MAX_CBW_SIZE;
cpucache_invalidate(); commit_discard_dcache();
#ifdef USB_USE_RAMDISK #ifdef USB_USE_RAMDISK
ramdisk_buffer = tb.transfer_buffer + ALLOCATE_BUFFER_SIZE; ramdisk_buffer = tb.transfer_buffer + ALLOCATE_BUFFER_SIZE;
#endif #endif