From 68af18a56f343525e92df6e5425a1f1ca39fd576 Mon Sep 17 00:00:00 2001
From: Aidan MacDonald <amachronic@protonmail.com>
Date: Sat, 3 Dec 2022 11:41:46 +0000
Subject: [PATCH] x1000: Simplify app linker script

Get the linker to automatically assign load addresses for
the .iram and .tcsm sections. Taken from the i.MX31 linker
script.

Change-Id: Ic03d577d8690c777726daf373a3289316639bfb9
---
 firmware/target/mips/ingenic_x1000/app.lds | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/firmware/target/mips/ingenic_x1000/app.lds b/firmware/target/mips/ingenic_x1000/app.lds
index ead88565c4..5b43f9576e 100644
--- a/firmware/target/mips/ingenic_x1000/app.lds
+++ b/firmware/target/mips/ingenic_x1000/app.lds
@@ -51,7 +51,13 @@ SECTIONS
         *(.sdata*);
     } > DRAM
 
-    .iram X1000_IRAM_BASE: AT (_bssbegin)
+    /*
+     * The following sections are loaded after normal DRAM sections
+     * but are copied elsewhere by the startup code.
+     */
+    _noloaddram = .;
+
+    .iram :
     {
         _iramstart = .;
         . = 0x000; /* TLB refill */
@@ -68,17 +74,19 @@ SECTIONS
         *(.irodata);
         *(.idata);
         _iramend = .;
-    } > IRAM
+    } > IRAM AT> DRAM
     _iramcopy = LOADADDR(.iram);
 
-    .tcsm X1000_TCSM_BASE: AT (_bssbegin + SIZEOF(.iram))
+    .tcsm :
     {
         _tcsmstart = .;
         KEEP(*(.tcsm*));
         _tcsmend = .;
-    } > TCSM
+    } > TCSM AT> DRAM
     _tcsmcopy = LOADADDR(.tcsm);
 
+    /* Sections below have no data. */
+
     . = ALIGN(4);
     .stack (NOLOAD) :
     {
@@ -91,7 +99,7 @@ SECTIONS
          _irqstackend = .;
     } > IRAM
 
-    .bss (NOLOAD) :
+    .bss _noloaddram (NOLOAD) :
     {
         _bssbegin = .;
         *(.sbss*);