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add s6d0154 register definitions, and flesh out lcd_init_device()
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18532 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Frank Gevaerts
parent
c0e898ae29
commit
66045bca7d
2 changed files with 158 additions and 1 deletions
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@ -25,6 +25,7 @@
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#include "lcd.h"
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#include "lcd.h"
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#include "system.h"
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#include "system.h"
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#include "cpu.h"
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#include "cpu.h"
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#include "s6d0154.h"
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/*** definitions ***/
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/*** definitions ***/
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@ -42,6 +43,8 @@
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#define SETSS() (PDAT7 |= (1 << 1))
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#define SETSS() (PDAT7 |= (1 << 1))
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#define CLRSS() (PDAT7 &= ~(1 << 1))
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#define CLRSS() (PDAT7 &= ~(1 << 1))
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static unsigned short controller_type = 0;
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void init_lcd_spi(void)
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void init_lcd_spi(void)
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{
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{
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int oldval;
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int oldval;
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@ -117,7 +120,6 @@ unsigned int lcd_spi_io(unsigned int output,unsigned int bits,unsigned int inski
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return (input);
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return (input);
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}
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}
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void spi_set_reg(unsigned char reg,unsigned short value)
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void spi_set_reg(unsigned char reg,unsigned short value)
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{
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{
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lcd_spi_io(0x700000|reg,24,0); // possibly 0x74
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lcd_spi_io(0x700000|reg,24,0); // possibly 0x74
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@ -172,6 +174,81 @@ void lcd_set_flip(bool yesno)
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/* LCD init */
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/* LCD init */
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void lcd_init_device(void)
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void lcd_init_device(void)
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{
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{
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controller_type = lcd_read_id();
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switch(controller_type)
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{
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case 0x0154:
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spi_set_reg(S6D0154_REG_EXTERNAL_INTERFACE_CONTROL, 0x130);
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spi_set_reg(S6D0154_REG_MTP_TEST_KEY, 0x8d);
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spi_set_reg(0x92, 0x10);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x1b);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_3, 0x3101);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_4, 0x105f);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_5, 0x667f);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_1, 0x800);
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delay(20);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x11b);
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delay(20);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x31b);
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delay(20);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x71b);
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delay(20);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf1b);
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delay(20);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf3b);
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delay(20);
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spi_set_reg(S6D0154_REG_DRIVER_OUTPUT_CONTROL, 0x2128);
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spi_set_reg(S6D0154_REG_LCD_DRIVING_WAVEFORM_CONTROL, 0x100);
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spi_set_reg(S6D0154_REG_ENTRY_MODE, 0x1030);
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0);
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spi_set_reg(S6D0154_REG_BLANK_PERIOD_CONTROL, 0x808);
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spi_set_reg(S6D0154_REG_FRAME_CYCLE_CONTROL, 0x1100);
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spi_set_reg(S6D0154_REG_START_OSCILLATION, 0xf01);
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spi_set_reg(S6D0154_REG_VCI_RECYCLING, 0);
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spi_set_reg(S6D0154_REG_GATE_SCAN_POSITION, 0);
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spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_1, 0x13f);
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spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_2, 0);
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spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_1, 0xef);
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spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_2, 0);
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spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_1, 0x13f);
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spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_2, 0);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_1, 0);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_2, 0xf00);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_3, 0xa03);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_4, 0x300);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_5, 0xc05);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_6, 0xf00);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_7, 0xf00);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_8, 3);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_9, 0x1f07);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_10, 0x71f);
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break;
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}
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}
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void lcd_off(void)
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{
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switch(controller_type)
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{
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case 0x0154:
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12);
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delay(20);
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x00);
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break;
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}
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}
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void lcd_on(void)
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{
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switch(controller_type)
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{
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case 0x0154:
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12);
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delay(20);
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x13);
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break;
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}
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}
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}
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/*** Update functions ***/
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/*** Update functions ***/
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80
firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h
Normal file
80
firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h
Normal file
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@ -0,0 +1,80 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: adc-target.h 17847 2008-06-28 18:10:04Z bagder $
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*
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* Copyright (C) 2008 by Frank Gevaerts
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef _S6D0154_H_
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#define _S6D0154_H_
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#define S6D0154_REG_VERSION 0x00
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#define S6D0154_REG_DRIVER_OUTPUT_CONTROL 0x01
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#define S6D0154_REG_LCD_DRIVING_WAVEFORM_CONTROL 0x02
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#define S6D0154_REG_ENTRY_MODE 0x03
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#define S6D0154_REG_DISPLAY_CONTROL 0x07
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#define S6D0154_REG_BLANK_PERIOD_CONTROL 0x08
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#define S6D0154_REG_FRAME_CYCLE_CONTROL 0x0B
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#define S6D0154_REG_EXTERNAL_INTERFACE_CONTROL 0x0C
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#define S6D0154_REG_START_OSCILLATION 0x0F
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#define S6D0154_REG_POWER_CONTROL_1 0x10
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#define S6D0154_REG_POWER_CONTROL_2 0x11
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#define S6D0154_REG_POWER_CONTROL_3 0x12
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#define S6D0154_REG_POWER_CONTROL_4 0x13
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#define S6D0154_REG_POWER_CONTROL_5 0x14
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#define S6D0154_REG_VCI_RECYCLING 0x15
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#define S6D0154_REG_RAM_ADDRESS_REGISTER_1 0x20
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#define S6D0154_REG_RAM_ADDRESS_REGISTER_2 0x21
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#define S6D0154_REG_GRAM_READ_WRITE 0x22
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#define S6D0154_REG_RESET 0x28
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#define S6D0154_REG_FLM_FUNCTION 0x29
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#define S6D0154_REG_GATE_SCAN_POSITION 0x30
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#define S6D0154_REG_VERTICAL_SCROLL_CONTROL_1A 0x31
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#define S6D0154_REG_VERTICAL_SCROLL_CONTROL_1B 0x32
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#define S6D0154_REG_VERTICAL_SCROLL_CONTROL_2 0x33
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#define S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_1 0x34
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#define S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_2 0x35
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#define S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_1 0x36
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#define S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_2 0x37
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#define S6D0154_REG_VERTICAL_WINDOW_ADDRESS_1 0x38
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#define S6D0154_REG_VERTICAL_WINDOW_ADDRESS_2 0x39
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#define S6D0154_REG_SUB_PANEL_CONTROL 0x40
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#define S6D0154_REG_MDDI_LINK_WAKEUP_START_POSITION 0x41
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#define S6D0154_REG_SUB_PANEL_SELECTION_INDEX 0x42
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#define S6D0154_REG_SUB_PANEL_DATA_WRITE_INDEX 0x43
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#define S6D0154_REG_GPIO_VALUE 0x44
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#define S6D0154_REG_GPIO_IO_CONTROL 0x45
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#define S6D0154_REG_GPIO_CLEAR 0x46
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#define S6D0154_REG_GPIO_INTERRUPT_ENABLE 0x47
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#define S6D0154_REG_GPIO_POLARITY_SELECTION 0x48
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#define S6D0154_REG_GAMMA_CONTROL_1 0x50
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#define S6D0154_REG_GAMMA_CONTROL_2 0x51
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#define S6D0154_REG_GAMMA_CONTROL_3 0x52
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#define S6D0154_REG_GAMMA_CONTROL_4 0x53
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#define S6D0154_REG_GAMMA_CONTROL_5 0x54
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#define S6D0154_REG_GAMMA_CONTROL_6 0x55
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#define S6D0154_REG_GAMMA_CONTROL_7 0x56
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#define S6D0154_REG_GAMMA_CONTROL_8 0x57
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#define S6D0154_REG_GAMMA_CONTROL_9 0x58
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#define S6D0154_REG_GAMMA_CONTROL_10 0x59
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#define S6D0154_REG_MTP_TEST_KEY 0x80
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#define S6D0154_REG_MTP_CONTROL_REGISTERS 0x81
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#define S6D0154_REG_MTP_DATA_READ_WRITE 0x82
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#define S6D0154_REG_PRODUCT_NAME_VERSION_WRITE 0x83
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#endif
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