mirror of
https://github.com/Rockbox/rockbox.git
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move PP specific files to pp/
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31533 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré
parent
bbe5845f04
commit
5cf79723ec
26 changed files with 23 additions and 23 deletions
367
firmware/target/arm/pp/crt0-pp502x-bl-usb.S
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367
firmware/target/arm/pp/crt0-pp502x-bl-usb.S
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@ -0,0 +1,367 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Linus Nielsen Feltzing
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* Copyright (C) 2010 by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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/* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux
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* loader
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*
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* Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
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* Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
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*
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*/
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.equ PROC_ID, 0x60000000
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.equ CPU_IDIS, 0x60004028
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.equ CPU_CTRL, 0x60007000
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.equ CPU_STATUS, 0x60007000
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.equ COP_IDIS, 0x60004038
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.equ COP_CTRL, 0x60007004
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.equ COP_STATUS, 0x60007004
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.equ CPU_SLEEPING,0x80000000
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.equ COP_SLEEPING,0x80000000
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.equ SLEEP, 0x80000000
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.equ WAKE, 0x00000000
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.equ MMAP_LOG, 0xf000f000 /* MMAP0 */
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.equ MMAP_PHYS, 0xf000f004
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.equ INT_VECT_TBL,0x6000f100
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.equ CACHE_CTRL, 0x6000c000
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.equ CACHE_ENAB, 0x1
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.equ CACHE_OP_COMMIT_DISCARD, 0x1
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.equ CACHE_OP_COMMIT , 0x0
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#if MEMORYSIZE > 32
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.equ MMAP_MASK, 0x00003c00
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#else
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.equ MMAP_MASK, 0x00003e00
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#endif
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.equ MMAP_FLAGS, 0x00000f84
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/*
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* Entry point
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*/
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.section .init.text,"ax",%progbits
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.global start
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start:
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b newstart
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#ifdef IPOD_ARCH
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.align 8 /* starts at 0x100 */
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.global boot_table
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boot_table:
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/* here comes the boot table, don't move its offset - preceding
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code+data must stay <= 256 bytes */
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.space 400
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#else /* !IPOD_ARCH */
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/* (more than enough) space for exception vectors and mi4 magic */
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.space 68*4
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#endif /* IPOD_ARCH */
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newstart:
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msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
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adr r4, start /* cache initial load address */
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/* Copy startup stub to IRAM since we need to both move the bootloader's
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* location, which could overlap itself, and setup the memory mapper. */
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adr r0, start_stub_begin
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mov r1, #0x40000000
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adr r2, start_stub_end
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1:
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ldr r3, [r0], #4
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str r3, [r1], #4
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cmp r0, r2
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blo 1b
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mov pc, #0x40000000
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start_stub_begin:
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ldr r0, =PROC_ID
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ldrb r0, [r0]
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cmp r0, #0x55
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beq cpu
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cop:
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mov r0, #CACHE_OP_COMMIT_DISCARD
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bl cache_operation
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ldr r1, =COP_CTRL
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mov r0, #SLEEP
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/* sleep us (co-processor) while bootloader is copied */
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str r0, [r1]
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nop
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nop
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nop
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/* branch to final physical load address */
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ldr r2, =1f
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and r4, r4, #0xfc000000
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add pc, r2, r4
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1:
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/* wait for bootloader to finish */
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str r0, [r1]
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nop
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nop
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nop
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/* branch to the address returned by main() */
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adr r0, startup_loc
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ldr pc, [r0]
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cpu:
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/* wait for COP to sleep */
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ldr r1, =COP_STATUS
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1:
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ldr r0, [r1]
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tst r0, #COP_SLEEPING
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beq 1b
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mov r0, #CACHE_OP_COMMIT_DISCARD
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bl cache_operation
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/* move bootloader to the correct load address if needed */
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ldr r1, =_loadaddress
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cmp r4, r1
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ldrne r2, =_loadaddressend
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movne r0, r4
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sublo r3, r2, r1 /* size */
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addlo r0, r0, r3 /* initial load end addr */
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1: /* lower to higher move - copy up */
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cmphi r2, r1
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ldrhi r3, [r0], #4
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strhi r3, [r1], #4
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bhi 1b
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1: /* higher to lower move - copy down */
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cmplo r1, r2
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ldrlo r3, [r0, #-4]!
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strlo r3, [r2, #-4]!
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blo 1b
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mov r0, #CACHE_OP_COMMIT
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bl cache_operation
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and r4, r4, #0xfc000000
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ldr r0, =MMAP_FLAGS
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orr r0, r0, r4 /* adjust for execute address */
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ldr r1, =MMAP_MASK
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ldr r2, =MMAP_LOG
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ldr r3, =MMAP_PHYS
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str r1, [r2] /* MMAP_LOG = MMAP_MASK */
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str r0, [r3] /* MMAP_PHYS = MMAP_FLAGS | SDRAM base addr */
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/* wake the COP to jump it to the correct place */
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ldr r1, =COP_CTRL
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mov r0, #WAKE
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str r0, [r1]
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/* wait for COP to halt then loading may proceed */
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ldr r1, =COP_STATUS
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1:
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ldr r0, [r1]
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tst r0, #COP_SLEEPING
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beq 1b
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ldr r0, =start_stub_end
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add pc, r0, r4
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cache_operation: /* (bool commit_discard) */
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ldr r2, =CACHE_CTRL
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ldr r1, [r2]
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tst r1, #CACHE_ENAB
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bxeq lr
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cmp r0, #CACHE_OP_COMMIT
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ldr r0, =0xf000f044
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ldr r1, [r0]
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orrne r1, r1, #0x6
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orreq r1, r1, #0x2
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str r1, [r0]
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1:
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ldr r1, [r2]
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tst r1, #0x8000
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bne 1b
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bx lr
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.ltorg /* constants used in stub come with us to IRAM */
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start_stub_end:
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/* now executing from final physical address */
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/* copy the vector addresses to the table */
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ldr r0, =INT_VECT_TBL
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adr r1, vectorsstart
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adr r2, vectorsend
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1:
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cmp r2, r1
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ldrhi r3, [r1], #4
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strhi r3, [r0], #4
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bhi 1b
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/* Copy the IRAM */
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ldr r0, =_iramcopy
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ldr r1, =_iramstart
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ldr r2, =_iramend
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1:
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cmp r2, r1
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ldrhi r3, [r0], #4
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strhi r3, [r1], #4
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bhi 1b
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mov r0, #0
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/* Zero out IBSS */
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ldr r1, =_iedata
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ldr r2, =_iend
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1:
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cmp r2, r1
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strhi r0, [r1], #4
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bhi 1b
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/* Initialise bss/ncbss sections to zero */
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ldr r1, =_edata
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ldr r2, =_end
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1:
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cmp r2, r1
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strhi r0, [r1], #4
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bhi 1b
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/* Set up stack for IRQ mode */
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msr cpsr_c, #0xd2 /* IRQ/FIQ disabled */
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ldr sp, =irq_stack
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/* Let svc, abort and undefined modes use irq stack */
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msr cpsr_c, #0xd3
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ldr sp, =irq_stack
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msr cpsr_c, #0xd7 /* IRQ/FIQ disabled */
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ldr sp, =irq_stack
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msr cpsr_c, #0xdb /* IRQ/FIQ disabled */
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ldr sp, =irq_stack
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/* Switch back to sys mode */
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msr cpsr_c, #0xdf
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/* Set up some stack and munge it with 0xdeadbeef */
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ldr r0, =0xdeadbeef
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ldr r1, =stackbegin
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ldr sp, =stackend
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1:
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cmp sp, r1
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strhi r0, [r1], #4
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bhi 1b
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/* execute the loader - this will load an image to 0x10000000 */
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ldr r0, =main
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mov lr, pc
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bx r0
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/* store actual startup location returned by main() */
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ldr r1, =startup_loc
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str r0, [r1]
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/* write back anything loaded + startup_loc */
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mov r0, #CACHE_OP_COMMIT
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bl cache_operation
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mov r0, #0
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/* disable memory mapper */
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ldr r1, =MMAP_LOG
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ldr r2, =MMAP_PHYS
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str r0, [r1]
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str r0, [r2]
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/* bring COP back to life */
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ldr r1, =COP_CTRL
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mov r0, #WAKE
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str r0, [r1]
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/* after this point, r0-r3 are reserved for OF magic */
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#if defined(SANSA_C200) || defined(PHILIPS_HDD1630)
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/* Magic for loading the c200 OF */
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ldr r0, =0xb00d10ad
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mov r1, #0x700
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ldr r2, =0xfff0
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mov r3, #0x7
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#endif
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#if defined(PHILIPS_HDD6330)
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/* Magic for loading the HDD6XX0 OF */
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ldr r0, =0xb00d10ad
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mov r1, #0x800
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ldr r2, =0xfff0
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mov r3, #0x7
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#endif
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/* branch to the address returned by main() */
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adr r4, startup_loc
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ldr pc, [r4]
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startup_loc:
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.word 0x00000000
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/* exception handlers: will be copied to local vector table */
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vectorsstart:
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.word newstart
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.word undef_instr_handler
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.word software_int_handler
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.word prefetch_abort_handler
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.word data_abort_handler
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.word reserved_handler
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.word irq_handler
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.word fiq_handler
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vectorsend:
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.text
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/* All illegal exceptions call into UIE with exception address as first
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parameter. This is calculated differently depending on which exception
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we're in. Second parameter is exception number, used for a string lookup
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in UIE.
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*/
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undef_instr_handler:
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sub r0, lr, #4
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mov r1, #0
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b UIE
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/* We run sys mode most of the time, and should never see a software
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exception being thrown. Make it illegal and call UIE.
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*/
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software_int_handler:
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reserved_handler:
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sub r0, lr, #4
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mov r1, #4
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b UIE
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prefetch_abort_handler:
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sub r0, lr, #4
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mov r1, #1
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b UIE
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data_abort_handler:
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sub r0, lr, #8
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mov r1, #2
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b UIE
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/* should never happen in the bootloader */
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fiq_handler:
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subs pc, lr, #4
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/* 256 words of IRQ stack */
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.section .bss
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.balign 16
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.space 256*4
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irq_stack:
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