mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-12-09 13:15:18 -05:00
iPod Classic: Fix several ATA driver bugs.
This improves compatibility with various HDD and CF/SD card mods. It should also reduce power consumption while the drive is powered down. Change-Id: I4b22c59b5d9ae2daea2ec5892e348e7e1934ca3e Reviewed-on: http://gerrit.rockbox.org/897 Tested: Franklin Wei <frankhwei536@gmail.com> Tested: Nial Shui <nialv7@gmail.com> Tested: Michael Sparmann <theseven@gmx.net> Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
This commit is contained in:
Michael Sparmann
Marcin Bukat
parent
3e131abe27
commit
582035c5cb
1 changed files with 108 additions and 51 deletions
159
firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
Normal file → Executable file
159
firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
Normal file → Executable file
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@ -78,18 +78,31 @@ uint64_t ata_virtual_sectors;
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uint32_t ata_last_offset;
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uint64_t ata_last_phys;
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static int ata_reset(void);
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static void ata_power_down(void);
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int ata_rw_sectors_internal(uint64_t sector, uint32_t count,
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void* buffer, bool write);
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int ata_bbt_read_sectors(uint32_t sector, uint32_t count, void* buffer)
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{
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if (ata_last_phys != sector - 1 && ata_last_phys > sector - 64) ata_soft_reset();
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if (ata_last_phys != sector - 1 && ata_last_phys > sector - 64) ata_reset();
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int rc = ata_rw_sectors_internal(sector, count, buffer, false);
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if (rc) rc = ata_rw_sectors_internal(sector, count, buffer, false);
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if (rc)
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{
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ata_reset();
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rc = ata_rw_sectors_internal(sector, count, buffer, false);
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}
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if (rc)
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{
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ata_power_down();
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sleep(HZ * 10);
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rc = ata_rw_sectors_internal(sector, count, buffer, false);
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}
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ata_last_phys = sector + count - 1;
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ata_last_offset = 0;
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if (IS_ERR(rc))
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panicf("ATA: Error %08X while reading BBT (sector %d, count %d)\n",
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panicf("ATA: Error %08X while reading BBT (sector %d, count %d)",
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(unsigned int)rc, (unsigned int)sector, (unsigned int)count);
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return rc;
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}
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@ -486,20 +499,20 @@ static int ceata_rw_multiple_block(bool write, void* buf, uint32_t count, long t
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| SDCI_CMD_CMD_TYPE_ADTC | cmdtype | responsetype
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| SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR,
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direction | MMC_CMD_CEATA_RW_MULTIPLE_BLOCK_COUNT(count),
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NULL, CEATA_COMMAND_TIMEOUT), 4, 0);
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NULL, CEATA_COMMAND_TIMEOUT), 3, 0);
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if (write) SDCI_DCTRL = SDCI_DCTRL_TRCONT_TX;
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if (semaphore_wait(&mmc_wakeup, timeout) == OBJ_WAIT_TIMEDOUT)
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{
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PASS_RC(ceata_cancel_command(), 4, 1);
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PASS_RC(ceata_cancel_command(), 3, 1);
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RET_ERR(2);
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}
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PASS_RC(mmc_dsta_check_data_success(), 4, 3);
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PASS_RC(mmc_dsta_check_data_success(), 3, 3);
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if (semaphore_wait(&mmc_comp_wakeup, timeout) == OBJ_WAIT_TIMEDOUT)
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{
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PASS_RC(ceata_cancel_command(), 4, 4);
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RET_ERR(4);
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PASS_RC(ceata_cancel_command(), 3, 4);
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RET_ERR(5);
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}
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PASS_RC(ceata_check_error(), 4, 5);
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PASS_RC(ceata_check_error(), 3, 6);
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return 0;
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}
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@ -540,23 +553,42 @@ bool ata_disk_is_active(void)
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static int ata_set_feature(uint32_t feature, uint32_t param)
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{
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PASS_RC(ata_wait_for_rdy(500000), 1, 0);
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ata_write_cbr(&ATA_PIO_DVR, 0);
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ata_write_cbr(&ATA_PIO_FED, 3);
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ata_write_cbr(&ATA_PIO_SCR, param);
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ata_write_cbr(&ATA_PIO_CSD, feature);
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PASS_RC(ata_wait_for_rdy(500000), 1, 1);
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if (ceata)
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{
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memset(ceata_taskfile, 0, 16);
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ceata_taskfile[0x1] = feature;
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ceata_taskfile[0x2] = param;
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ceata_taskfile[0xf] = 0xef;
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PASS_RC(ceata_wait_idle(), 2, 0);
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PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 2, 1);
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PASS_RC(ceata_wait_idle(), 2, 2);
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}
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else
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{
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PASS_RC(ata_wait_for_rdy(2000000), 2, 0);
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ata_write_cbr(&ATA_PIO_DVR, 0);
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ata_write_cbr(&ATA_PIO_FED, feature);
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ata_write_cbr(&ATA_PIO_SCR, param);
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ata_write_cbr(&ATA_PIO_CSD, 0xef);
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PASS_RC(ata_wait_for_rdy(2000000), 2, 1);
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}
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return 0;
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}
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static int ata_power_up(void)
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{
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ata_set_active();
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if (ata_powered) return 0;
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ide_power_enable(true);
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long spinup_start = current_tick;
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if (ceata)
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{
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ata_lba48 = true;
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ata_dma = true;
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PCON(8) = 0x33333333;
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PCON(9) = 0x00000033;
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PCON(11) |= 0xf;
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*((uint32_t volatile*)0x38a00000) = 0;
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*((uint32_t volatile*)0x38700000) = 0;
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PWRCON(0) &= ~(1 << 9);
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SDCI_RESET = 0xa5;
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sleep(HZ / 100);
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@ -567,15 +599,19 @@ static int ata_power_up(void)
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SDCI_CDIV = SDCI_CDIV_CLKDIV(260);
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*((uint32_t volatile*)0x3cf00200) = 0xb000f;
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SDCI_IRQ_MASK = SDCI_IRQ_MASK_MASK_DAT_DONE_INT | SDCI_IRQ_MASK_MASK_IOCARD_IRQ_INT;
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PASS_RC(mmc_init(), 2, 0);
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PASS_RC(mmc_init(), 3, 0);
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SDCI_CDIV = SDCI_CDIV_CLKDIV(4);
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sleep(HZ / 100);
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PASS_RC(ceata_init(8), 2, 1);
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PASS_RC(ata_identify(ata_identify_data), 2, 2);
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PASS_RC(ceata_init(8), 3, 1);
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PASS_RC(ata_identify(ata_identify_data), 3, 2);
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dma_mode = 0x44;
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}
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else
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{
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PCON(7) = 0x44444444;
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PCON(8) = 0x44444444;
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PCON(9) = 0x44444444;
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PCON(10) = (PCON(10) & ~0xffff) | 0x4444;
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PWRCON(0) &= ~(1 << 5);
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ATA_CFG = BIT(0);
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sleep(HZ / 100);
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@ -591,7 +627,7 @@ static int ata_power_up(void)
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ATA_PIO_LHR = 0;
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if (!ata_swap) ATA_CFG = BIT(6);
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while (!(ATA_PIO_READY & BIT(1))) yield();
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PASS_RC(ata_identify(ata_identify_data), 2, 0);
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PASS_RC(ata_identify(ata_identify_data), 3, 3);
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uint32_t piotime = 0x11f3;
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uint32_t mdmatime = 0x1c175;
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uint32_t udmatime = 0x5071152;
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@ -648,14 +684,15 @@ static int ata_power_up(void)
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}
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ata_dma = param ? true : false;
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dma_mode = param;
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PASS_RC(ata_set_feature(0xef, param), 2, 1);
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if (ata_identify_data[82] & BIT(5)) PASS_RC(ata_set_feature(0x02, 0), 2, 2);
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if (ata_identify_data[82] & BIT(6)) PASS_RC(ata_set_feature(0x55, 0), 2, 3);
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PASS_RC(ata_set_feature(0x03, param), 3, 4);
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ATA_PIO_TIME = piotime;
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ATA_MDMA_TIME = mdmatime;
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ATA_UDMA_TIME = udmatime;
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}
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spinup_time = current_tick - spinup_start;
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if (ata_identify_data[82] & BIT(5))
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PASS_RC(ata_set_feature(ata_bbt ? 0x82 : 0x02, 0), 3, 5);
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if (ata_identify_data[82] & BIT(6)) PASS_RC(ata_set_feature(0xaa, 0), 3, 6);
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if (ata_lba48)
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ata_total_sectors = ata_identify_data[100]
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| (((uint64_t)ata_identify_data[101]) << 16)
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@ -678,6 +715,7 @@ static void ata_power_down(void)
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ceata_taskfile[0xf] = 0xe0;
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ceata_wait_idle();
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ceata_write_multiple_register(0, ceata_taskfile, 16);
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ceata_wait_idle();
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sleep(HZ);
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PWRCON(0) |= (1 << 9);
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}
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@ -692,6 +730,11 @@ static void ata_power_down(void)
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while (!(ATA_CONTROL & BIT(1))) yield();
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PWRCON(0) |= (1 << 5);
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}
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PCON(7) = 0;
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PCON(8) = 0;
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PCON(9) = 0;
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PCON(10) &= ~0xffff;
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PCON(11) &= ~0xf;
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ide_power_enable(false);
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}
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@ -886,7 +929,7 @@ static int ata_rw_sectors(uint64_t sector, uint32_t count, void* buffer, bool wr
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uint32_t cnt;
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PASS_RC(ata_bbt_translate(sector, count, &phys, &cnt), 0, 0);
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uint32_t offset = phys - sector;
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if (offset != ata_last_offset && phys - ata_last_phys < 64) ata_soft_reset();
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if (offset != ata_last_offset && phys - ata_last_phys < 64) ata_reset();
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ata_last_offset = offset;
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ata_last_phys = phys + cnt;
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PASS_RC(ata_rw_sectors_internal(phys, cnt, buffer, write), 0, 0);
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@ -912,7 +955,7 @@ int ata_rw_sectors_internal(uint64_t sector, uint32_t count, void* buffer, bool
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uint32_t cnt = MIN(ata_lba48 ? 8192 : 32, count);
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int rc = -1;
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rc = ata_rw_chunk(sector, cnt, buffer, write);
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if (rc && ata_error_srst) ata_soft_reset();
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if (rc && ata_error_srst) ata_reset();
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if (rc && ata_retries)
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{
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void* buf = buffer;
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@ -924,7 +967,7 @@ int ata_rw_sectors_internal(uint64_t sector, uint32_t count, void* buffer, bool
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while (tries-- && rc)
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{
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rc = ata_rw_chunk(sect, 1, buf, write);
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if (rc && ata_error_srst) ata_soft_reset();
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if (rc && ata_error_srst) ata_reset();
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}
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if (rc) break;
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buf += SECTOR_SIZE;
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@ -959,7 +1002,7 @@ int ata_soft_reset(void)
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{
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int rc;
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mutex_lock(&ata_mutex);
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if (!ata_powered) ata_power_up();
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if (!ata_powered) PASS_RC(ata_power_up(), 1, 0);
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ata_set_active();
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if (ceata) rc = ceata_soft_reset();
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else
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@ -967,13 +1010,42 @@ int ata_soft_reset(void)
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ata_write_cbr(&ATA_PIO_DAD, BIT(1) | BIT(2));
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udelay(10);
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ata_write_cbr(&ATA_PIO_DAD, 0);
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rc = ata_wait_for_rdy(20000000);
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rc = ata_wait_for_rdy(3000000);
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}
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ata_set_active();
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mutex_unlock(&ata_mutex);
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PASS_RC(rc, 1, 1);
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return 0;
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}
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int ata_hard_reset(void)
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{
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mutex_lock(&ata_mutex);
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PASS_RC(ata_power_up(), 0, 0);
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ata_set_active();
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mutex_unlock(&ata_mutex);
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return 0;
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}
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static int ata_reset(void)
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{
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int rc;
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mutex_lock(&ata_mutex);
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if (!ata_powered) PASS_RC(ata_power_up(), 2, 0);
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ata_set_active();
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rc = ata_soft_reset();
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if (IS_ERR(rc))
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{
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ata_power_down();
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sleep(HZ * 3);
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ata_power_up();
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rc = ata_hard_reset();
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if (IS_ERR(rc))
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{
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rc = ERR_RC((rc << 2) | 1);
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ata_power_down();
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sleep(HZ * 3);
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int rc2 = ata_power_up();
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if (IS_ERR(rc2)) rc = ERR_RC((rc << 2) | 2);
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}
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else rc = 1;
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}
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ata_set_active();
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mutex_unlock(&ata_mutex);
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@ -1052,11 +1124,11 @@ void ata_bbt_disable(void)
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mutex_unlock(&ata_mutex);
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}
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void ata_bbt_reload(void)
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int ata_bbt_reload(void)
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{
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mutex_lock(&ata_mutex);
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ata_bbt_disable();
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ata_power_up();
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PASS_RC(ata_power_up(), 1, 0);
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uint32_t* buf = (uint32_t*)(ata_bbt_buf + sizeof(ata_bbt_buf) - SECTOR_SIZE);
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if (buf)
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{
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@ -1064,6 +1136,7 @@ void ata_bbt_reload(void)
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ata_virtual_sectors = ata_total_sectors;
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else if (!memcmp(buf, "emBIbbth", 8))
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{
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if (ata_identify_data[82] & BIT(5)) PASS_RC(ata_set_feature(0x02, 0), 1, 1);
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ata_virtual_sectors = (((uint64_t)buf[0x1fd]) << 32) | buf[0x1fc];
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uint32_t count = buf[0x1ff];
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if (count > ATA_BBT_PAGES / 64)
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@ -1089,6 +1162,7 @@ void ata_bbt_reload(void)
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}
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else ata_virtual_sectors = ata_total_sectors;
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mutex_unlock(&ata_mutex);
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return 0;
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}
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#endif
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@ -1099,29 +1173,11 @@ int ata_init(void)
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semaphore_init(&mmc_wakeup, 1, 0);
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semaphore_init(&mmc_comp_wakeup, 1, 0);
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ceata = PDAT(11) & BIT(1);
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if (ceata)
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{
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ata_lba48 = true;
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ata_dma = true;
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PCON(8) = 0x33333333;
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PCON(9) = (PCON(9) & ~0xff) | 0x33;
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PCON(11) |= 0xf;
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*((uint32_t volatile*)0x38a00000) = 0;
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*((uint32_t volatile*)0x38700000) = 0;
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}
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else
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{
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PCON(7) = 0x44444444;
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PCON(8) = 0x44444444;
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PCON(9) = 0x44444444;
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PCON(10) = (PCON(10) & ~0xffff) | 0x4444;
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}
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ata_swap = false;
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ata_powered = false;
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ata_total_sectors = 0;
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ata_power_up();
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#ifdef ATA_HAVE_BBT
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ata_bbt_reload();
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PASS_RC(ata_bbt_reload(), 0, 0);
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#endif
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/* HDD data endianness check:
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@ -1191,3 +1247,4 @@ void INT_MMC(void)
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if (irq & SDCI_IRQ_IOCARD_IRQ_INT) semaphore_release(&mmc_comp_wakeup);
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SDCI_IRQ = irq;
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}
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