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Add some CACHEALIGN_* macros and a helper function to assist in aligning data and buffers on PortalPlayer processors to cache line boundaries. They're noops when PROC_NEED_CACHEALIGN isn't defined. Go safe and increase the value to 32 since I'm not sure yet if 16 is sufficient - changing that is a one-liner. Add helper to plugin API which will be needed shortly.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15523 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2007-11-08 05:17:20 +00:00
parent 194a66ef83
commit 57d71e4267
8 changed files with 87 additions and 5 deletions
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4
firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
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@ -109,9 +109,9 @@ static unsigned short r_drv_output_control = R_DRV_OUTPUT_CONTROL_NORMAL;
/* We don't know how to receive a DMA finished signal from the LCD controller
* To avoid problems with flickering, we double-buffer the framebuffer and turn
* off DMA while updates are taking place
* Same alignment as in lcd-16bit.c and cache interference free */
* At least the alignment as in lcd-16bit.c and cache interference free */
static fb_data lcd_driver_framebuffer[LCD_FBHEIGHT][LCD_FBWIDTH]
__attribute__((aligned(16)));
CACHEALIGN_AT_LEAST_ATTR(16);
#ifdef BOOTLOADER
static void lcd_init_gpio(void)