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Gigabeat S: Move the LCD framebuffer address so that DRAM can be mapped flat between physical and virtual addresses. NO BOOTLOADER UPDATE SHOULD BE NEEDED. The firmware image now handles low-level system setup as well.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19935 a1c6a512-1295-4272-9138-f99709370657
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f747d9d39e
commit
4d3a020f27
6 changed files with 36 additions and 27 deletions
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@ -34,7 +34,8 @@ STARTUP(target/arm/imx31/crt0.o)
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MEMORY
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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DEVBSS : ORIGIN = 0x80100000 + FRAME_SIZE, LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE
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DEVBSS : ORIGIN = CSD0_BASE_ADDR + (MEMORYSIZE * 0x100000 - 0x100000), \
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LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE
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}
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SECTIONS
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@ -8,7 +8,7 @@ STARTUP(target/arm/imx31/crt0.o)
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#define DRAMSIZE (1 << 20) /* Limit 1 MB for bootloader */
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#define DRAMORIG (0x02000000-0x00100000)
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#define DRAMORIG 0x02000000
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/* #define IRAMORIG 0x1FFFC000 */
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#define IRAM DRAM
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#define IRAMSIZE IRAM_SIZE
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@ -19,7 +19,8 @@ STARTUP(target/arm/imx31/crt0.o)
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MEMORY
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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DEVBSS : ORIGIN = 0x80100000 + FRAME_SIZE, LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE
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DEVBSS : ORIGIN = CSD0_BASE_ADDR + (MEMORYSIZE*0x100000 - 0x100000), \
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LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE
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}
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SECTIONS
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@ -57,7 +57,6 @@ start:
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newstart:
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msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
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#ifdef BOOTLOADER
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adr r2, remap_start /* Load PC-relative labels */
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adr r3, remap_end
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ldr r5, =TTB_BASE_ADDR /* TTB pointer */
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@ -127,13 +126,6 @@ remap_start:
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/*** End of L2 operations ***/
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/* TTB Initialisation */
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mov r2, r5
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add r3, r5, #TTB_SIZE
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mov r1, #0
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1:
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str r1, [r2], #4
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cmp r2, r3
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blo 1b
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/* Set TTB base address */
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mcr p15, 0, r5, c2, c0, 0
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@ -157,32 +149,29 @@ remap_start:
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add r1, r1, #(1 << 20) /* Next MB */
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cmp r2, r3
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blo 1b
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sub r1, r1, #TTB_SIZE/4*(1 << 20) /* Back up */
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bic r1, r1, #0x0ff00000 /* Back up */
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/* Map 0x80000000 -> 0x0, cached */
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mov r2, r5 /* TTB pointer */
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add r3, r5, #63*4 /* End position */
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add r3, r5, #64*4 /* End position */
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orr r1, r1, #0x80000000 /* Physical address */
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orr r1, r1, #((1 << 3) | /* cache flag */ \
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(1 << 2)) /* buffer flag */
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1:
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str r1, [r2], #4
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add r1, r1, #(1 << 20)
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and r4, r1, #0x0ff00000
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cmp r4, #0x00100000 /* Skip framebuffer */
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addeq r1, r1, #(1 << 20)
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cmp r2, r3
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blo 1b
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/* Map device section 0x80100000 to 0x03f00000 - buffered, not cached */
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/* Map device section 0x83f00000 to 0x03f00000 - buffered, not cached */
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bic r1, r1, #0x0ff00000
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orr r1, r1, #0x00100000
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orr r1, r1, #0x03f00000
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bic r1, r1, #(1 << 3)
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add r2, r5, #63*4
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str r1, [r2]
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/* Enable MMU */
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mov r0, #0
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mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLB */
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mcr p15, 0, r0, c7, c7, 0 /* Invalidate icache and dcache */
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@ -230,8 +219,6 @@ L_post_remap:
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.word remap_end
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remap_end:
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#endif /* BOOTLOADER */
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#ifdef BOOTLOADER
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/* Copy bootloader exception handler code to address 0 */
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ldr r2, =_vectorsstart
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@ -27,6 +27,7 @@
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#include "lcd-target.h"
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#include "backlight-target.h"
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#define MAIN_LCD_IDMAC_CHANNEL 14
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#define LCDADDR(x, y) (&lcd_framebuffer[(y)][(x)])
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static volatile bool lcd_on = true;
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@ -46,6 +47,15 @@ extern void lcd_copy_buffer_rect(fb_data *dst, const fb_data *src,
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/* LCD init */
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void lcd_init_device(void)
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{
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/* Move the framebuffer */
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#ifdef BOOTLOADER
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/* Only do this once to avoid flicker */
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memset(FRAME, 0x00, FRAME_SIZE);
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#endif
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IPU_IDMAC_CHA_EN &= ~(1ul << MAIN_LCD_IDMAC_CHANNEL);
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IPU_IMA_ADDR = ((0x1 << 16) | (MAIN_LCD_IDMAC_CHANNEL << 4)) + (1 << 3);
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IPU_IMA_DATA = FRAME_PHYS_ADDR;
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IPU_IDMAC_CHA_EN |= (1ul << MAIN_LCD_IDMAC_CHANNEL);
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}
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/* Update a fraction of the display. */
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