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Fix-m the ruddiness.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19401 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2008-12-12 11:20:58 +00:00
parent e69d567d9e
commit 4bbaef6fd5
6 changed files with 8 additions and 12 deletions
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8
firmware/drivers/audio/tlv320.c
View file

@ -157,10 +157,10 @@ void audiohw_set_frequency(int fsel)
/* All rates available for 11.2896MHz besides 8.021 */
static const unsigned char values_src[HW_NUM_FREQ] =
{
[HW_FREQ_11] = (0x8 << 2) | SRC_CLKIN,
[HW_FREQ_22] = (0x8 << 2) | SRC_CLKIN,
[HW_FREQ_44] = (0x8 << 2),
[HW_FREQ_88] = (0xf << 2),
HW_HAVE_11_([HW_FREQ_11] = (0x8 << 2) | SRC_CLKIN,)
HW_HAVE_22_([HW_FREQ_22] = (0x8 << 2) | SRC_CLKIN,)
HW_HAVE_44_([HW_FREQ_44] = (0x8 << 2),)
HW_HAVE_88_([HW_FREQ_88] = (0xf << 2),)
};
unsigned value_dap, value_pc;

2
firmware/drivers/audio/tsc2100.c
View file

@ -131,6 +131,6 @@ void audiohw_close(void)
}
void audiohw_set_frequency(int fsel)
{
(void)fsel;
}

2
firmware/drivers/audio/wm8758.c
View file

@ -107,7 +107,7 @@ void audiohw_preinit(void)
wmcodec_write(OUTCTRL, OUTCTRL_VROI);
wmcodec_write(CLKCTRL, CLKCTRL_MS); /* WM8758 is clock master */
audiohw_set_sample_rate(HW_FREQ_44);
audiohw_set_frequency(HW_FREQ_44);
wmcodec_write(LOUTMIX, LOUTMIX_DACL2LMIX);
wmcodec_write(ROUTMIX, ROUTMIX_DACR2RMIX);

4
firmware/target/arm/audio-pp.c
View file

@ -35,7 +35,7 @@ void audio_input_mux(int source, unsigned flags)
(void)flags;
/* Prevent pops from unneeded switching */
static int last_source = AUDIO_SRC_PLAYBACK;
#ifdef HAVE_FMRADIO_REC
#ifdef HAVE_FMRADIO_REC
bool recording = flags & SRCF_RECORDING;
static bool last_recording = false;
#endif
@ -43,7 +43,7 @@ void audio_input_mux(int source, unsigned flags)
#if defined(IPOD_COLOR) || defined (IPOD_4G)
/* The usual magic from IPL - I'm guessing this configures the headphone
socket to be input or output. */
if (recording && source != AUDIO_SRC_PLAYBACK)
if ((flags & SRCF_RECORDING) && source != AUDIO_SRC_PLAYBACK)
{
/* input */
GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);

2
firmware/target/arm/pcm-telechips.c
View file

@ -58,8 +58,6 @@ struct dma_data dma_play_data SHAREDBSS_ATTR =
.state = 0
};
static unsigned long pcm_sampr SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
void pcm_postinit(void)
{
audiohw_postinit();

2
firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
View file

@ -28,8 +28,6 @@
#include "audiohw.h"
#include "dsp-target.h"
static int pcm_fsel = HW_FREQ_DEFAULT;
void pcm_play_dma_init(void)
{
IO_CLK_O1DIV = 3;