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Initial mini2440 port.

Browse source 
Flyspray: FS#10627
Author: Bob Cousins

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23265 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dominik Wenger 2009-10-19 18:14:27 +00:00
parent 660dbd697d
commit 41c497025f
24 changed files with 1353 additions and 184 deletions
Download patch file Download diff file Expand all files Collapse all files

79
firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c
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@ -1,79 +0,0 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 by Michael Sevakis
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "config.h"
#include "system.h"
#include "kernel.h"
#include "timer.h"
#include "thread.h"
void tick_start(unsigned int interval_in_ms)
{
/*
* Based on default PCLK of 49.1568MHz - scaling chosen to give
* remainder-free result for tick interval of 10ms (100Hz)
* Timer input clock frequency =
* fPCLK / {prescaler value+1} / {divider value}
* TIMER_FREQ = 49156800 / 2
* 146300 = TIMER_FREQ / 21 / 8
* 49156800 = 19*11*(7)*7*5*5*(3)*2*2*2*2*2*2
* 21 = 7*3
*/
/* stop timer 4 */
TCON &= ~(1 << 20);
/* Set the count for timer 4 */
TCNTB4 = (TIMER_FREQ / TIMER234_PRESCALE / 8) * interval_in_ms / 1000;
/* Set the the prescaler value for timers 2,3, and 4 */
TCFG0 = (TCFG0 & ~0xff00) | ((TIMER234_PRESCALE-1) << 8);
/* DMA mode off, MUX4 = 1/16 */
TCFG1 = (TCFG1 & ~0xff0000) | 0x030000;
/* set manual bit */
TCON |= 1 << 21;
/* reset manual bit */
TCON &= ~(1 << 21);
/* interval mode */
TCON |= 1 << 22;
/* start timer 4 */
TCON |= (1 << 20);
/* timer 4 unmask interrupts */
INTMSK &= ~TIMER4_MASK;
}
#ifdef BOOTLOADER
void tick_stop(void)
{
s3c_regset32(&INTMSK, TIMER4_MASK);
TCON &= ~(1 << 20);
SRCPND = TIMER4_MASK;
INTPND = TIMER4_MASK;
}
#endif
void TIMER4(void)
{
/* Run through the list of tick tasks */
call_tick_tasks();
SRCPND = TIMER4_MASK;
INTPND = TIMER4_MASK;
}

558
firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
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@ -1,558 +0,0 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 by Greg White
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include <sys/types.h>
#include "config.h"
#include "system.h"
#include "cpu.h"
#include "string.h"
#include "lcd.h"
#include "kernel.h"
#include "lcd-target.h"
#define LCDADDR(x, y) (&lcd_framebuffer[(y)][(x)])
static bool lcd_on = true;
#if defined(HAVE_LCD_ENABLE) || defined(HAVE_LCD_SLEEP)
static bool lcd_powered = true;
#endif
static unsigned lcd_yuv_options = 0;
/*
** This is imported from lcd-16bit.c
*/
extern struct viewport* current_vp;
/* Copies a rectangle from one framebuffer to another. Can be used in
single transfer mode with width = num pixels, and height = 1 which
allows a full-width rectangle to be copied more efficiently. */
extern void lcd_copy_buffer_rect(fb_data *dst, const fb_data *src,
int width, int height);
#if defined(HAVE_LCD_ENABLE) || defined(HAVE_LCD_SLEEP)
bool lcd_active(void)
{
return lcd_on;
}
#endif
static unsigned int LCDBANK(unsigned int address)
{
return ((address >> 22) & 0xff);
}
static unsigned int LCDBASEU(unsigned int address)
{
return (address & ((1 << 22)-1)) >> 1;
}
static unsigned int LCDBASEL(unsigned int address)
{
address += 320*240*2;
return (address & ((1 << 22)-1)) >> 1;
}
static inline void delay_cycles(volatile int delay)
{
while(delay>0) delay--;
}
static void LCD_CTRL_setup(void)
{
/* ENVID = 0, BPPMODE = 16 bpp, PNRMODE = TFT, MMODE = Each Frame, CLKVAL = 8 */
LCDCON1 = 0x878;
/* VCPW = 1, VFPD = 5, LINEVAL = 319, VBPD = 7 */
LCDCON2 = 0x74FC141;
/* HFPD = 9, HOZVAL = 239, HBPD = 7 */
LCDCON3 = 0x38EF09;
/* HSPW = 7 */
LCDCON4 = 7;
/* HWSWP = 1, INVVFRAM = 1, INVVLINE = 1, FRM565 = 1, All others = 0 */
LCDCON5 = 0xB01;
LCDSADDR1 = (LCDBANK((unsigned)FRAME) << 21) | (LCDBASEU((unsigned)FRAME));
LCDSADDR2 = LCDBASEL((unsigned)FRAME);
LCDSADDR3 = 0x000000F0;
}
static void LCD_CTRL_clock(bool onoff)
{
if(onoff)
{
GPCCON &= ~0xFFF000FC;
GPDCON &= ~0xFFF0FFF0;
GPCCON |= 0xAAA000A8;
GPCUP |= 0xFC0E;
GPDCON |= 0xAAA0AAA0;
GPDUP |= 0xFCFC;
s3c_regset32(&CLKCON, 0x20); /* enable LCD clock */
LCDCON1 |=0x01;
}
else
{
GPCCON &= ~0xFFF000FC;
GPCUP &= ~0xFC0E;
GPDCON &= ~0xFFF0FFF0;
GPDUP &= ~0xFCFC;
LCDCON1 &= ~1; /* Must diable first or bus may freeze */
s3c_regclr32(&CLKCON, 0x20); /* disable LCD clock */
}
}
static void reset_LCD(bool reset)
{
GPBCON&=~0xC000;
GPBCON|=0x4000;
if(reset)
GPBDAT|=0x80;
else
GPBDAT&=~0x80;
}
static void LCD_SPI_send(const unsigned char *array, int count)
{
while (count--)
{
while ((SPSTA0&0x01)==0){};
SPTDAT0=*array++;
}
}
static void LCD_SPI_setreg(unsigned char reg, unsigned char value)
{
unsigned char regval[] =
{
0x00,reg,0x01,value
};
LCD_SPI_send(regval, sizeof(regval));
}
static void LCD_SPI_SS(bool select)
{
delay_cycles(0x4FFF);
GPBCON&=~0x30000;
GPBCON|=0x10000;
if(select)
GPBDAT|=0x100;
else
GPBDAT&=~0x100;
}
static void LCD_SPI_start(void)
{
s3c_regset32(&CLKCON, 0x40000); /* enable SPI clock */
LCD_SPI_SS(false);
SPCON0=0x3E;
SPPRE0=24;
reset_LCD(true);
LCD_SPI_SS(true);
}
static void LCD_SPI_stop(void)
{
LCD_SPI_SS(false);
SPCON0 &= ~0x10;
s3c_regclr32(&CLKCON, 0x40000); /* disable SPI clock */
}
static void LCD_SPI_init(void)
{
/*
* SPI setup - Some of these registers are known; they are documented in
* the wiki. Many thanks to Alex Gerchanovsky for discovering this
* sequence.
*/
LCD_CTRL_clock(true);
LCD_SPI_start();
LCD_SPI_setreg(0x0F, 0x01);
LCD_SPI_setreg(0x09, 0x06);
LCD_SPI_setreg(0x16, 0xA6);
LCD_SPI_setreg(0x1E, 0x49);
LCD_SPI_setreg(0x1F, 0x26);
LCD_SPI_setreg(0x0B, 0x2F);
LCD_SPI_setreg(0x0C, 0x2B);
LCD_SPI_setreg(0x19, 0x5E);
LCD_SPI_setreg(0x1A, 0x15);
LCD_SPI_setreg(0x1B, 0x15);
LCD_SPI_setreg(0x1D, 0x01);
LCD_SPI_setreg(0x00, 0x03);
LCD_SPI_setreg(0x01, 0x10);
LCD_SPI_setreg(0x02, 0x0A);
LCD_SPI_setreg(0x06, 0x04); /* Set the orientation */
LCD_SPI_setreg(0x08, 0x2E);
LCD_SPI_setreg(0x24, 0x12);
LCD_SPI_setreg(0x25, 0x3F);
LCD_SPI_setreg(0x26, 0x0B);
LCD_SPI_setreg(0x27, 0x00);
LCD_SPI_setreg(0x28, 0x00);
LCD_SPI_setreg(0x29, 0xF6);
LCD_SPI_setreg(0x2A, 0x03);
LCD_SPI_setreg(0x2B, 0x0A);
LCD_SPI_setreg(0x04, 0x01); /* Turn the display on */
LCD_SPI_stop();
}
/* LCD init */
void lcd_init_device(void)
{
#ifdef BOOTLOADER
int i;
/* When the Rockbox bootloader starts the framebuffer address is changed
* but the LCD display should stay the same til an lcd_update() occurs.
* This copies the data from the old framebuffer to the new one to make the
* change non-visable to the user.
*/
unsigned short *buf = (unsigned short*)(FRAME);
unsigned short *oldbuf = (unsigned short*)(LCDSADDR1<<1);
/* The Rockbox bootloader is transitioning from RGB555I to RGB565 mode
so convert the frambuffer data accordingly */
for(i=0; i< 320*240; i++)
{
*(buf++) = ((*oldbuf>>1) & 0x1F) | (*oldbuf & 0xffc0);
oldbuf++;
}
#endif
/* Set pins up */
GPHUP &= 0x600;
GPECON |= 0x0A800000;
GPEUP |= 0x3800;
GPBUP |= 0x181;
s3c_regset32(&CLKCON, 0x20); /* enable LCD clock */
LCD_CTRL_setup();
LCD_SPI_init();
}
#if defined(HAVE_LCD_SLEEP)
static void LCD_SPI_powerdown(void)
{
lcd_powered = false;
LCD_SPI_start();
LCD_SPI_setreg(0x04, 0x00);
LCD_SPI_stop();
reset_LCD(false); /* This makes a big difference on power */
LCD_CTRL_clock(false);
}
void lcd_sleep(void)
{
if (lcd_powered)
{
/* "not powered" implies "disabled" */
if (lcd_on)
lcd_enable(false);
LCD_SPI_powerdown();
}
}
#endif
#if defined(HAVE_LCD_ENABLE)
static void LCD_SPI_powerup(void)
{
LCD_CTRL_clock(true);
LCD_SPI_start();
LCD_SPI_setreg(0x04, 0x01);
LCD_SPI_stop();
lcd_powered = true;
}
void lcd_enable(bool state)
{
if (state == lcd_on)
return;
if(state)
{
/* "enabled" implies "powered" */
if (!lcd_powered)
{
LCD_SPI_powerup();
/* Wait long enough for a frame to be written - yes, it
* takes awhile. */
sleep(HZ/5);
}
lcd_on = true;
lcd_update();
lcd_activation_call_hook();
}
else
{
lcd_on = false;
}
}
#endif
void lcd_set_flip(bool yesno) {
if (!lcd_on)
return;
LCD_SPI_start();
if(yesno)
{
LCD_SPI_setreg(0x06, 0x02);
}
else
{
LCD_SPI_setreg(0x06, 0x04);
}
LCD_SPI_stop();
}
int lcd_default_contrast(void)
{
return DEFAULT_CONTRAST_SETTING;
}
void lcd_set_contrast(int val) {
if (!lcd_on)
return;
LCD_SPI_start();
LCD_SPI_setreg(0x0B, (unsigned char) val);
LCD_SPI_stop();
}
void lcd_set_invert_display(bool yesno) {
if (!lcd_on)
return;
LCD_SPI_start();
if(yesno)
{
LCD_SPI_setreg(0x27, 0x10);
}
else
{
LCD_SPI_setreg(0x27, 0x00);
}
LCD_SPI_stop();
}
/* Update a fraction of the display. */
void lcd_update_rect(int x, int y, int width, int height)
{
fb_data *dst, *src;
if (!lcd_on)
return;
if (x + width > LCD_WIDTH)
width = LCD_WIDTH - x; /* Clip right */
if (x < 0)
width += x, x = 0; /* Clip left */
if (width <= 0)
return; /* nothing left to do */
if (y + height > LCD_HEIGHT)
height = LCD_HEIGHT - y; /* Clip bottom */
if (y < 0)
height += y, y = 0; /* Clip top */
if (height <= 0)
return; /* nothing left to do */
/* TODO: It may be faster to swap the addresses of lcd_driver_framebuffer
* and lcd_framebuffer */
dst = (fb_data *)FRAME + LCD_WIDTH*y + x;
src = &lcd_framebuffer[y][x];
/* Copy part of the Rockbox framebuffer to the second framebuffer */
if (width < LCD_WIDTH)
{
/* Not full width - do line-by-line */
lcd_copy_buffer_rect(dst, src, width, height);
}
else
{
/* Full width - copy as one line */
lcd_copy_buffer_rect(dst, src, LCD_WIDTH*height, 1);
}
}
/* Update the display.
This must be called after all other LCD functions that change the display. */
void lcd_update(void)
{
if (!lcd_on)
return;
lcd_copy_buffer_rect((fb_data *)FRAME, &lcd_framebuffer[0][0],
LCD_WIDTH*LCD_HEIGHT, 1);
}
void lcd_bitmap_transparent_part(const fb_data *src, int src_x, int src_y,
int stride, int x, int y, int width,
int height)
{
int w, px;
fb_data *dst;
if (x + width > current_vp->width)
width = current_vp->width - x; /* Clip right */
if (x < 0) /* Clip left */
{
width += x;
src_x -= x;
x = 0;
}
if (width <= 0)
return; /* nothing left to do */
if (y + height > current_vp->height)
height = current_vp->height - y; /* Clip bottom */
if (y < 0) /* Clip top */
{
height += y;
src_y -= y;
y = 0;
}
if (height <= 0)
return; /* nothing left to do */
src += stride * src_y + src_x; /* move starting point */
dst = &lcd_framebuffer[current_vp->y+y][current_vp->x+x];
asm volatile (
".rowstart: \r\n"
"mov %[w], %[width] \r\n" /* Load width for inner loop */
".nextpixel: \r\n"
"ldrh %[px], [%[s]], #2 \r\n" /* Load src pixel */
"add %[d], %[d], #2 \r\n" /* Uncoditionally increment dst */
"cmp %[px], %[fgcolor] \r\n" /* Compare to foreground color */
"streqh %[fgpat], [%[d], #-2] \r\n" /* Store foregroud if match */
"cmpne %[px], %[transcolor] \r\n" /* Compare to transparent color */
"strneh %[px], [%[d], #-2] \r\n" /* Store dst if not transparent */
"subs %[w], %[w], #1 \r\n" /* Width counter has run down? */
"bgt .nextpixel \r\n" /* More in this row? */
"add %[s], %[s], %[sstp], lsl #1 \r\n" /* Skip over to start of next line */
"add %[d], %[d], %[dstp], lsl #1 \r\n"
"subs %[h], %[h], #1 \r\n" /* Height counter has run down? */
"bgt .rowstart \r\n" /* More rows? */
: [w]"=&r"(w), [h]"+&r"(height), [px]"=&r"(px),
[s]"+&r"(src), [d]"+&r"(dst)
: [width]"r"(width),
[sstp]"r"(stride - width),
[dstp]"r"(LCD_WIDTH - width),
[transcolor]"r"(TRANSPARENT_COLOR),
[fgcolor]"r"(REPLACEWITHFG_COLOR),
[fgpat]"r"(current_vp->fg_pattern)
);
}
void lcd_yuv_set_options(unsigned options)
{
lcd_yuv_options = options;
}
/* Line write helper function for lcd_yuv_blit. Write two lines of yuv420. */
extern void lcd_write_yuv420_lines(fb_data *dst,
unsigned char const * const src[3],
int width,
int stride);
extern void lcd_write_yuv420_lines_odither(fb_data *dst,
unsigned char const * const src[3],
int width,
int stride,
int x_screen, /* To align dither pattern */
int y_screen);
/* Performance function to blit a YUV bitmap directly to the LCD */
/* For the Gigabeat - show it rotated */
/* So the LCD_WIDTH is now the height */
void lcd_blit_yuv(unsigned char * const src[3],
int src_x, int src_y, int stride,
int x, int y, int width, int height)
{
/* Caches for chroma data so it only need be recaculated every other
line */
unsigned char const * yuv_src[3];
off_t z;
if (!lcd_on)
return;
/* Sorry, but width and height must be >= 2 or else */
width &= ~1;
height >>= 1;
y = LCD_WIDTH - 1 - y;
fb_data *dst = (fb_data*)FRAME + x * LCD_WIDTH + y;
z = stride*src_y;
yuv_src[0] = src[0] + z + src_x;
yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
if (lcd_yuv_options & LCD_YUV_DITHER)
{
do
{
lcd_write_yuv420_lines_odither(dst, yuv_src, width, stride, y, x);
yuv_src[0] += stride << 1; /* Skip down two luma lines */
yuv_src[1] += stride >> 1; /* Skip down one chroma line */
yuv_src[2] += stride >> 1;
dst -= 2;
y -= 2;
}
while (--height > 0);
}
else
{
do
{
lcd_write_yuv420_lines(dst, yuv_src, width, stride);
yuv_src[0] += stride << 1; /* Skip down two luma lines */
yuv_src[1] += stride >> 1; /* Skip down one chroma line */
yuv_src[2] += stride >> 1;
dst -= 2;
}
while (--height > 0);
}
}

22
firmware/target/arm/s3c2440/gigabeat-fx/lcd-target.h
View file

@ -21,3 +21,25 @@
extern void lcd_enable(bool state);
/* Config values for LCDCON1 */
/* ENVID = 0, BPPMODE = 16 bpp, PNRMODE = TFT, MMODE = Each Frame, CLKVAL = 8 */
#define LCD_CLKVAL 8
#define LCD_MMODE 0
#define LCD_PNRMODE 3
#define LCD_BPPMODE 12
#define LCD_ENVID 1
/* Config values for LCDCON2 */
/* VCPW = 1, VFPD = 5, VBPD = 7 */
#define LCD_UPPER_MARGIN 7
#define LCD_LOWER_MARGIN 5
#define LCD_VSYNC_LEN 1
/* Config values for LCDCON3 */
/* HFPD = 9, HBPD = 7 */
#define LCD_LEFT_MARGIN 7
#define LCD_RIGHT_MARGIN 9
/* Config values for LCDCON4 */
/* HSPW = 7 */
#define LCD_HSYNC_LEN 7

243
firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
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@ -1,243 +0,0 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 by Michael Sevakis
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "kernel.h"
#include "system.h"
#include "panic.h"
#include "mmu-arm.h"
#include "cpu.h"
#define default_interrupt(name) \
extern __attribute__((weak,alias("UIRQ"))) void name (void)
default_interrupt(EINT0);
default_interrupt(EINT1);
default_interrupt(EINT2);
default_interrupt(EINT3);
default_interrupt(EINT4_7);
default_interrupt(EINT8_23);
default_interrupt(CAM);
default_interrupt(nBATT_FLT);
default_interrupt(TICK);
default_interrupt(WDT_AC97);
default_interrupt(TIMER0);
default_interrupt(TIMER1);
default_interrupt(TIMER2);
default_interrupt(TIMER3);
default_interrupt(TIMER4);
default_interrupt(UART2);
default_interrupt(LCD);
default_interrupt(DMA0);
default_interrupt(DMA1);
default_interrupt(DMA2);
default_interrupt(DMA3);
default_interrupt(SDI);
default_interrupt(SPI0);
default_interrupt(UART1);
default_interrupt(NFCON);
default_interrupt(USBD);
default_interrupt(USBH);
default_interrupt(IIC);
default_interrupt(UART0);
default_interrupt(SPI1);
default_interrupt(RTC);
default_interrupt(ADC);
static void (* const irqvector[32])(void) __attribute__((__used__)) =
{
EINT0, EINT1, EINT2, EINT3,
EINT4_7, EINT8_23, CAM, nBATT_FLT, TICK, WDT_AC97,
TIMER0, TIMER1, TIMER2, TIMER3, TIMER4, UART2,
LCD, DMA0, DMA1, DMA2, DMA3, SDI,
SPI0, UART1, NFCON, USBD, USBH, IIC,
UART0, SPI1, RTC, ADC,
};
static const char * const irqname[32] =
{
"EINT0", "EINT1", "EINT2", "EINT3",
"EINT4_7", "EINT8_23", "CAM", "nBATT_FLT", "TICK", "WDT_AC97",
"TIMER0", "TIMER1", "TIMER2", "TIMER3", "TIMER4", "UART2",
"LCD", "DMA0", "DMA1", "DMA2", "DMA3", "SDI",
"SPI0", "UART1", "NFCON", "USBD", "USBH", "IIC",
"UART0", "SPI1", "RTC", "ADC"
};
static void UIRQ(void)
{
unsigned int offset = INTOFFSET;
panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]);
}
void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
void irq_handler(void)
{
asm volatile (
"sub lr, lr, #4 \r\n"
"stmfd sp!, {r0-r3, ip, lr} \r\n"
"mov r0, #0x4a000000 \r\n" /* INTOFFSET = 0x4a000014 */
"ldr r0, [r0, #0x14] \r\n"
"ldr r1, =irqvector \r\n"
"ldr r1, [r1, r0, lsl #2] \r\n"
"mov lr, pc \r\n"
"bx r1 \r\n"
"ldmfd sp!, {r0-r3, ip, pc}^ \r\n"
);
}
void system_reboot(void)
{
WTCON = 0;
WTCNT = WTDAT = 1 ;
WTCON = 0x21;
for(;;)
;
}
void system_exception_wait(void)
{
INTMSK = 0xFFFFFFFF;
while ((GPGDAT & (1 << 0)) == 0); /* Wait for power button */
}
static void set_page_tables(void)
{
/* map every memory region to itself */
map_section(0, 0, 0x1000, CACHE_NONE);
/* map RAM to 0 and enable caching for it */
map_section(0x30000000, 0, 32, CACHE_ALL);
/* enable buffered writing for the framebuffer */
map_section((int)FRAME, (int)FRAME, 1, BUFFERED);
}
void memory_init(void)
{
ttb_init();
set_page_tables();
enable_mmu();
}
void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
unsigned long mask)
{
int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS);
*reg = (*reg & ~mask) | (bits & mask);
restore_interrupt(oldstatus);
}
void s3c_regset32(volatile unsigned long *reg, unsigned long bits)
{
s3c_regmod32(reg, bits, bits);
}
void s3c_regclr32(volatile unsigned long *reg, unsigned long bits)
{
s3c_regmod32(reg, 0, bits);
}
#ifdef BOOTLOADER
void system_prepare_fw_start(void)
{
tick_stop();
disable_interrupt(IRQ_FIQ_STATUS);
INTMSK = 0xFFFFFFFF;
}
#endif
void system_init(void)
{
INTMSK = 0xFFFFFFFF;
INTMOD = 0;
SRCPND = 0xFFFFFFFF;
INTPND = 0xFFFFFFFF;
INTSUBMSK = 0xFFFFFFFF;
SUBSRCPND = 0xFFFFFFFF;
GPBCON |= 0x85;
GPBDAT |= 0x07;
GPBUP |= 0x20F;
/* Take care of flash related pins */
GPCCON |= 0x1000;
GPCDAT &= ~0x40;
GPCUP |= 0x51;
GPDCON |= 0x05;
GPDUP |= 0x03;
GPDDAT &= ~0x03;
GPFCON |= 0x00000AAA;
GPFUP |= 0xFF;
GPGCON |= 0x01001000;
GPGUP |= 0x70;
GPHCON |= 0x4005;
GPHDAT |= 0x03;
/* TODO: do something with PRIORITY */
/* Turn off currently-not or never-needed devices.
* Be careful here, it is possible to freeze the device by disabling
* clocks at the wrong time.
*
* Turn off AC97, Camera, SPI, IIS, I2C, UARTS, MMC/SD/SDIO Controller
* USB device, USB host, NAND flash controller.
*
* IDLE, Sleep, LCDC, PWM timer, GPIO, RTC, and ADC are untouched (on)
*/
CLKCON &= ~0xFF1ED0;
CLKSLOW |= 0x80;
}
int system_memory_guard(int newmode)
{
(void)newmode;
return 0;
}
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
void set_cpu_frequency(long frequency)
{
if (frequency == CPUFREQ_MAX)
{
asm volatile("mov r0, #0\n"
"mrc p15, 0, r0, c1, c0, 0\n"
"orr r0, r0, #3<<30\n" /* set to Asynchronous mode*/
"mcr p15, 0, r0, c1, c0, 0" : : : "r0");
FREQ = CPUFREQ_MAX;
}
else
{
asm volatile("mov r0, #0\n"
"mrc p15, 0, r0, c1, c0, 0\n"
"bic r0, r0, #3<<30\n" /* set to FastBus mode*/
"mcr p15, 0, r0, c1, c0, 0" : : : "r0");
FREQ = CPUFREQ_NORMAL;
}
}
#endif

44
firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
View file

@ -1,44 +0,0 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 by Greg White
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef SYSTEM_TARGET_H
#define SYSTEM_TARGET_H
#include "system-arm.h"
#include "mmu-arm.h"
#define CPUFREQ_DEFAULT 98784000
#define CPUFREQ_NORMAL 98784000
#define CPUFREQ_MAX 296352000
void system_prepare_fw_start(void);
void tick_stop(void);
/* Functions to set and clear regiser bits atomically */
/* Set and clear register bits */
void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
unsigned long mask);
/* Set register bits */
void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
/* Clear register bits */
void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
#endif /* SYSTEM_TARGET_H */