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Initial mini2440 port.

Browse source 
Flyspray: FS#10627
Author: Bob Cousins

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23265 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dominik Wenger 2009-10-19 18:14:27 +00:00
parent 660dbd697d
commit 41c497025f
24 changed files with 1353 additions and 184 deletions
Download patch file Download diff file Expand all files Collapse all files

291
firmware/target/arm/s3c2440/crt0.S
View file

@ -26,6 +26,149 @@
#include "config.h"
#include "cpu.h"
/****************************************************************************/
#ifdef TOSHIBA_GIGABEAT_F
/* Clock and Power Management setup values */
#define VAL_CLKDIV 0x7
#define VAL_UPLLCON 0x0003C042
#define VAL_MPLLCON 0x000C9042
/* Memory Controller setup */
/* Memory setup (taken from 0x5070) */
/* BWSCON
* Reserved 0
* Bank 0:
* Bus width 01 (16 bit)
* Bank 1:
* Buswidth 00 (8 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 2:
* Buswidth 10 (32 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 3:
* Buswidth 10 (32 bit)
* Disable wait 0
* Use UB/LB 1
* Bank 4:
* Buswidth 10 (32 bit)
* Disable wait 0
* Use UB/LB 1
* Bank 5:
* Buswidth 00 (8 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 6:
* Buswidth 10 (32 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 7:
* Buswidth 00 (8 bit)
* Disable wait 0
* Not using UB/LB 0
*/
#define VAL_BWSCON 0x01055102
/* BANKCON0
* Pagemode: normal (1 data) 00
* Pagemode access cycle: 2 clocks 00
* Address hold: 2 clocks 10
* Chip selection hold time: 1 clock 10
* Access cycle: 8 clocks 101
* Chip select setup time: 1 clock 01
* Address setup time: 0 clock 00
*/
#define VAL_BANKCON0 0x00000D60
/* BANKCON1
* Pagemode: normal (1 data) 00
* Pagemode access cycle: 2 clocks 00
* Address hold: 0 clocks 00
* Chip selection hold time: 0 clock 00
* Access cycle: 1 clocks 000
* Chip select setup time: 0 clocks 00
* Address setup time: 0 clocks 00
*/
#define VAL_BANKCON1 0x00000000
/* BANKCON2
* Pagemode: normal (1 data) 00
* Pagemode access cycle: 2 clocks 00
* Address hold: 2 clocks 10
* Chip selection hold time: 2 clocks 10
* Access cycle: 14 clocks 111
* Chip select setup time: 4 clocks 11
* Address setup time: 0 clocks 00
*/
#define VAL_BANKCON2 0x00001FA0
#define VAL_BANKCON3 0x00001D80
#define VAL_BANKCON4 0x00001D80
#define VAL_BANKCON5 0x00000000
/* BANKCON6/7
* SCAN: 9 bit 01
* Trcd: 3 clocks 01
* Tcah: 0 clock 00
* Tcoh: 0 clock 00
* Tacc: 1 clock 000
* Tcos: 0 clock 00
* Tacs: 0 clock 00
* MT: Sync DRAM 11
*/
#define VAL_BANKCON6 0x00018005
#define VAL_BANKCON7 0x00018005
#define VAL_REFRESH 0x00980501
/* BANKSIZE
* BK76MAP: 32M/32M 000
* Reserved: 0 0 (was 1)
* SCLK_EN: always 1 (was 0)
* SCKE_EN: disable 0
* Reserved: 0 0
* BURST_EN: enabled 1
*/
#define VAL_BANKSIZE 0x00000090
#define VAL_MRSRB6 0x00000030
#define VAL_MRSRB7 0x00000030
#define VAL_GPACON 0x00FFFFFF
/****************************************************************************/
#elif defined (MINI2440)
/* For Mini2440 board or compatible */
/* Clock and Power Management setup values */
#define VAL_CLKDIV 0x5 /* HCLK = FCLK/4, PCLK = HCLK/2 */
#define VAL_UPLLCON 0x00038022 /* UCLK = 48 MHz */
#define VAL_MPLLCON 0x0007F021 /* FCLK = 405 MHz */
#define FCLK 405000000
#define HCLK (FCLK/4) /* = 101,250,000 */
#define PCLK (HCLK/2) /* = 50,625,000 */
/* Memory Controller setup */
#define VAL_BWSCON 0x22111112
#define VAL_BANKCON0 0x00002F50
#define VAL_BANKCON1 0x00000700
#define VAL_BANKCON2 0x00000700
#define VAL_BANKCON3 0x00000700
#define VAL_BANKCON4 0x00000700
#define VAL_BANKCON5 0x0007FFFC
#define VAL_BANKCON6 0x00018009
#define VAL_BANKCON7 0x00018009
#define VAL_REFRESH 0x008E04EB
#define VAL_BANKSIZE 0x000000B2
#define VAL_MRSRB6 0x00000030
#define VAL_MRSRB7 0x00000030
#define VAL_GPACON 0x00FFFFFF
#define VAL_GPFCON 0x000055AA
#define VAL_GPGCON 0xAA2A0128
#define VAL_GPGDAT 0x0000
#else
#error Unknown target
#endif
/****************************************************************************/
/* Exception Handlers */
.section .vectors,"ax",%progbits
.code 32
@ -73,6 +216,7 @@ word_copy:
.ltorg
.size word_copy, .-word_copy
/*
* Entry: start
* Variables:
@ -95,6 +239,7 @@ start:
/************************** DO NOT WRITE TO R0 ***************************/
#ifdef TOSHIBA_GIGABEAT_F
/* Check if the code is running from flash. If not skip all these checks */
cmp r0, #0xA0000
bne poweron
@ -105,7 +250,6 @@ start:
str r1, [r2, #0x14]
/* Did an RTC event wake the player up? */
mov r2, #0x4A000000
ldr r1, [r2]
ands r1, r1, #0x40000000
@ -147,6 +291,7 @@ start:
bootOF:
/* power is not down || menu is held || the charger is not connected */
mov pc, #0x70
#endif
poweron:
/* enter supervisor mode, disable IRQ */
@ -166,6 +311,7 @@ poweron:
ldr r2, =0x00003FFF
str r2, [r1, #0x1C]
#ifdef TOSHIBA_GIGABEAT_F
/* Check if loaded by the old bootloader or by the OF. This copy routine
* cannot run/copy properly until the memory has been initialized, so the
* copy routine later is still necessary. The old bootloader/OF will
@ -198,6 +344,7 @@ poweron:
bl word_copy
mov pc, #0x31000000
#endif
skipreset:
@ -209,7 +356,7 @@ skipreset:
orr r0, r0, r1
mcr p15, 0, r0, c1, c0, 0
mov r2, #0x7
mov r2, #VAL_CLKDIV
mov r1, #0x4C000000
str r2, [r1, #0x14]
@ -219,7 +366,7 @@ skipreset:
ldr r2, =0xFFFFFFFF
str r2, [r1]
ldr r2, =0x0003C042
ldr r2, =VAL_UPLLCON
str r2, [r1, #0x08]
nop
@ -231,7 +378,7 @@ skipreset:
nop
nop
ldr r2, =0x000C9042
ldr r2, =VAL_MPLLCON
str r2, [r1, #0x04]
nop
@ -248,128 +395,55 @@ skipreset:
mov r1, #0x56000000
str r2, [r1, #0x80]
/* Memory setup (taken from 0x5070) */
/* Memory setup */
/* BWSCON
* Reserved 0
* Bank 0:
* Bus width 01 (16 bit)
* Bank 1:
* Buswidth 00 (8 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 2:
* Buswidth 10 (32 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 3:
* Buswidth 10 (32 bit)
* Disable wait 0
* Use UB/LB 1
* Bank 4:
* Buswidth 10 (32 bit)
* Disable wait 0
* Use UB/LB 1
* Bank 5:
* Buswidth 00 (8 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 6:
* Buswidth 10 (32 bit)
* Disable wait 0
* Not using UB/LB 0
* Bank 7:
* Buswidth 00 (8 bit)
* Disable wait 0
* Not using UB/LB 0
*/
ldr r2, =0x01055102
ldr r2, =VAL_BWSCON
mov r1, #0x48000000
str r2, [r1]
/* BANKCON0
* Pagemode: normal (1 data) 00
* Pagemode access cycle: 2 clocks 00
* Address hold: 2 clocks 10
* Chip selection hold time: 1 clock 10
* Access cycle: 8 clocks 101
* Chip select setup time: 1 clock 01
* Address setup time: 0 clock 00
*/
ldr r2, =0x00000D60
/* BANKCON0 */
ldr r2, =VAL_BANKCON0
str r2, [r1, #0x04]
/* BANKCON1
* Pagemode: normal (1 data) 00
* Pagemode access cycle: 2 clocks 00
* Address hold: 0 clocks 00
* Chip selection hold time: 0 clock 00
* Access cycle: 1 clocks 000
* Chip select setup time: 0 clocks 00
* Address setup time: 0 clocks 00
*/
ldr r2, =0x00000000
/* BANKCON1 */
ldr r2, =VAL_BANKCON1
str r2, [r1, #0x08]
/* BANKCON2
* Pagemode: normal (1 data) 00
* Pagemode access cycle: 2 clocks 00
* Address hold: 2 clocks 10
* Chip selection hold time: 2 clocks 10
* Access cycle: 14 clocks 111
* Chip select setup time: 4 clocks 11
* Address setup time: 0 clocks 00
*/
ldr r2, =0x00001FA0
/* BANKCON2 */
ldr r2, =VAL_BANKCON2
str r2, [r1, #0xC]
/* BANKCON3 */
ldr r2, =0x00001D80
ldr r2, =VAL_BANKCON3
str r2, [r1, #0x10]
/* BANKCON4 */
str r2, [r1, #0x14]
/* BANKCON5 */
ldr r2, =0x00000000
ldr r2, =VAL_BANKCON5
str r2, [r1, #0x18]
/* BANKCON6/7
* SCAN: 9 bit 01
* Trcd: 3 clocks 01
* Tcah: 0 clock 00
* Tcoh: 0 clock 00
* Tacc: 1 clock 000
* Tcos: 0 clock 00
* Tacs: 0 clock 00
* MT: Sync DRAM 11
*/
ldr r2, =0x00018005
/* BANKCON6/7 */
ldr r2, =VAL_BANKCON6
str r2, [r1, #0x1C]
/* BANKCON7 */
str r2, [r1, #0x20]
/* REFRESH */
ldr r2, =0x00980501
ldr r2, =VAL_REFRESH
str r2, [r1, #0x24]
/* BANKSIZE
* BK76MAP: 32M/32M 000
* Reserved: 0 0 (was 1)
* SCLK_EN: always 1 (was 0)
* SCKE_EN: disable 0
* Reserved: 0 0
* BURST_EN: enabled 1
*/
ldr r2, =0x00000090
/* BANKSIZE */
ldr r2, =VAL_BANKSIZE
str r2, [r1, #0x28]
/* MRSRB6 */
ldr r2, =0x00000030
ldr r2, =VAL_MRSRB6
str r2, [r1, #0x2C]
/* MRSRB7 */
str r2, [r1, #0x30]
/* RMC: I guess this is some notes about Gigabeat */
/*
0x56000000 0x1FFFCFF
4 0x1FFFEFF
@ -379,25 +453,33 @@ skipreset:
/* GPACON */
mov r1, #0x56000000
ldr r2, =0x00FFFFFF
ldr r2, =VAL_GPACON
str r2, [r1]
/* The builds have two potential load addresses, one being from flash,
#if 0
/* GPGCON */
ldr r2, =VAL_GPGCON
str r2, [r1, #0x60]
ldr r2, =VAL_GPGDAT
str r2, [r1, #0x64]
#endif
/* Copy from current location (from NOR Flash if bootloader, load buffer if
firmware) to RAM */
/* Gigabeat: The builds have two potential load addresses, one being from flash,
* and the other from some "unknown" location right now the assumption
* is that the code is not at 0x3000000.
*/
/* get the high part of our execute address (where am I) */
ldr r0, =0xfffff000
and r0, pc, r0
and r0, pc, r0 /* copy from address */
/* Copy code to 0x30000000 */
/* SDRAM starts at 0x30000000 (physical address) */
ldr r1, =0x30000000 /* copy To address */
ldr r2, = _vectorstart
ldr r3, = _initdata_end
sub r2, r3, r2 /* length of loader */
ldr r1, =0x30000000 /* copy location */
bl word_copy
ldr r1, =donecopy
@ -410,8 +492,8 @@ donecopy:
/* Setup the MMU, start by disabling */
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x41 /* disable mmu and dcache */
bic r0, r0, #0x1000 /* disable icache */
bic r0, r0, #0x41 /* disable mmu and dcache */
bic r0, r0, #0x1000 /* disable icache */
mcr p15, 0, r0, c1, c0, 0
bl ttb_init
@ -515,6 +597,7 @@ fiq_handler:
UIE:
b UIE
/* TODO: Review this function - is it target dependent? */
/*
* Function: rom_shutdown
* Variables:

5
firmware/target/arm/s3c2440/debug-target.h
View file

@ -19,7 +19,12 @@
*
****************************************************************************/
#ifdef GIGABEAT_F
#define DEBUG_CANCEL BUTTON_POWER
#elif defined(MINI2440)
#define DEBUG_CANCEL BUTTON_MENU
#endif
bool __dbg_hw_info(void);
bool __dbg_ports(void);

22
firmware/target/arm/s3c2440/gigabeat-fx/lcd-target.h
View file

@ -21,3 +21,25 @@
extern void lcd_enable(bool state);
/* Config values for LCDCON1 */
/* ENVID = 0, BPPMODE = 16 bpp, PNRMODE = TFT, MMODE = Each Frame, CLKVAL = 8 */
#define LCD_CLKVAL 8
#define LCD_MMODE 0
#define LCD_PNRMODE 3
#define LCD_BPPMODE 12
#define LCD_ENVID 1
/* Config values for LCDCON2 */
/* VCPW = 1, VFPD = 5, VBPD = 7 */
#define LCD_UPPER_MARGIN 7
#define LCD_LOWER_MARGIN 5
#define LCD_VSYNC_LEN 1
/* Config values for LCDCON3 */
/* HFPD = 9, HBPD = 7 */
#define LCD_LEFT_MARGIN 7
#define LCD_RIGHT_MARGIN 9
/* Config values for LCDCON4 */
/* HSPW = 7 */
#define LCD_HSYNC_LEN 7

0
firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c → firmware/target/arm/s3c2440/kernel-s3c2440.c
View file

88
firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c → firmware/target/arm/s3c2440/lcd-s3c2440.c
View file

@ -8,6 +8,7 @@
* $Id$
*
* Copyright (C) 2007 by Greg White
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@ -76,18 +77,14 @@ static inline void delay_cycles(volatile int delay)
static void LCD_CTRL_setup(void)
{
/* ENVID = 0, BPPMODE = 16 bpp, PNRMODE = TFT, MMODE = Each Frame, CLKVAL = 8 */
LCDCON1 = 0x878;
LCDCON1 = (LCD_CLKVAL << 8) | (LCD_MMODE << 7) | (LCD_PNRMODE << 5) |
(LCD_BPPMODE << 1);
LCDCON2 = (LCD_UPPER_MARGIN << 24) | ((LCD_HEIGHT - 1) << 14) |
(LCD_LOWER_MARGIN << 6) | (LCD_VSYNC_LEN << 0);
LCDCON3 = (LCD_LEFT_MARGIN << 19) | ((LCD_WIDTH - 1) << 8) |
(LCD_RIGHT_MARGIN << 0);
LCDCON4 = (LCD_HSYNC_LEN << 0);
/* VCPW = 1, VFPD = 5, LINEVAL = 319, VBPD = 7 */
LCDCON2 = 0x74FC141;
/* HFPD = 9, HOZVAL = 239, HBPD = 7 */
LCDCON3 = 0x38EF09;
/* HSPW = 7 */
LCDCON4 = 7;
/* HWSWP = 1, INVVFRAM = 1, INVVLINE = 1, FRM565 = 1, All others = 0 */
LCDCON5 = 0xB01;
@ -100,17 +97,16 @@ static void LCD_CTRL_clock(bool onoff)
{
if(onoff)
{
GPCCON &= ~0xFFF000FC;
GPDCON &= ~0xFFF0FFF0;
GPCCON &=~0xFFF000FC;
GPCCON |= 0xAAA000A8;
GPCUP |= 0xFC0E;
GPDCON &=~0xFFF0FFF0;
GPDCON |= 0xAAA0AAA0;
GPDUP |= 0xFCFC;
s3c_regset32(&CLKCON, 0x20); /* enable LCD clock */
LCDCON1 |=0x01;
LCDCON1 |= LCD_ENVID;
}
else
{
@ -120,11 +116,12 @@ static void LCD_CTRL_clock(bool onoff)
GPDCON &= ~0xFFF0FFF0;
GPDUP &= ~0xFCFC;
LCDCON1 &= ~1; /* Must diable first or bus may freeze */
LCDCON1 &= ~LCD_ENVID; /* Must disable first or bus may freeze */
s3c_regclr32(&CLKCON, 0x20); /* disable LCD clock */
}
}
#ifdef GIGABEAT_F
static void reset_LCD(bool reset)
{
GPBCON&=~0xC000;
@ -134,10 +131,14 @@ static void reset_LCD(bool reset)
else
GPBDAT&=~0x80;
}
#endif
/****************************************************************************/
#ifdef GIGABEAT_F
static void LCD_SPI_send(const unsigned char *array, int count)
{
while (count--)
while (count--)
{
while ((SPSTA0&0x01)==0){};
SPTDAT0=*array++;
@ -146,7 +147,7 @@ static void LCD_SPI_send(const unsigned char *array, int count)
static void LCD_SPI_setreg(unsigned char reg, unsigned char value)
{
unsigned char regval[] =
unsigned char regval[] =
{
0x00,reg,0x01,value
};
@ -162,7 +163,7 @@ static void LCD_SPI_SS(bool select)
if(select)
GPBDAT|=0x100;
else
else
GPBDAT&=~0x100;
}
@ -182,7 +183,7 @@ static void LCD_SPI_stop(void)
LCD_SPI_SS(false);
SPCON0 &= ~0x10;
s3c_regclr32(&CLKCON, 0x40000); /* disable SPI clock */
s3c_regclr32(&CLKCON, 0x40000); /* disable SPI clock */
}
static void LCD_SPI_init(void)
@ -221,8 +222,10 @@ static void LCD_SPI_init(void)
LCD_SPI_setreg(0x2A, 0x03);
LCD_SPI_setreg(0x2B, 0x0A);
LCD_SPI_setreg(0x04, 0x01); /* Turn the display on */
LCD_SPI_stop();
LCD_SPI_stop();
}
#endif
/****************************************************************************/
/* LCD init */
void lcd_init_device(void)
@ -247,18 +250,21 @@ void lcd_init_device(void)
#endif
/* Set pins up */
GPHUP &= 0x600;
GPECON |= 0x0A800000;
GPEUP |= 0x3800;
#ifdef GIGABEAT_F
GPBUP |= 0x181;
#endif
s3c_regset32(&CLKCON, 0x20); /* enable LCD clock */
LCD_CTRL_setup();
#ifdef GIGABEAT_F
LCD_SPI_init();
#else
LCD_CTRL_clock(true);
#endif
}
#if defined(HAVE_LCD_SLEEP)
@ -319,13 +325,14 @@ void lcd_enable(bool state)
lcd_update();
lcd_activation_call_hook();
}
else
else
{
lcd_on = false;
}
}
#endif
#ifdef GIGABEAT_F
void lcd_set_flip(bool yesno) {
if (!lcd_on)
return;
@ -335,7 +342,7 @@ void lcd_set_flip(bool yesno) {
{
LCD_SPI_setreg(0x06, 0x02);
}
else
else
{
LCD_SPI_setreg(0x06, 0x04);
}
@ -365,12 +372,37 @@ void lcd_set_invert_display(bool yesno) {
{
LCD_SPI_setreg(0x27, 0x10);
}
else
else
{
LCD_SPI_setreg(0x27, 0x00);
}
LCD_SPI_stop();
}
#else
void lcd_set_flip(bool yesno)
{
(void)yesno;
/* Not implemented */
}
int lcd_default_contrast(void)
{
return DEFAULT_CONTRAST_SETTING;
}
void lcd_set_contrast(int val)
{
(void)val;
/* Not implemented */
}
void lcd_set_invert_display(bool yesno)
{
(void)yesno;
/* Not implemented */
}
#endif
/* Update a fraction of the display. */
void lcd_update_rect(int x, int y, int width, int height)
@ -423,6 +455,7 @@ void lcd_update(void)
LCD_WIDTH*LCD_HEIGHT, 1);
}
#if defined(TOSHIBA_GIGABEAT_F) || defined(TOSHIBA_GIGABEAT_S)
void lcd_bitmap_transparent_part(const fb_data *src, int src_x, int src_y,
int stride, int x, int y, int width,
int height)
@ -485,6 +518,7 @@ void lcd_bitmap_transparent_part(const fb_data *src, int src_x, int src_y,
[fgpat]"r"(current_vp->fg_pattern)
);
}
#endif
void lcd_yuv_set_options(unsigned options)
{

42
firmware/target/arm/s3c2440/mini2440/adc-target.h Normal file
View file

@ -0,0 +1,42 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef _ADC_TARGET_H_
#define _ADC_TARGET_H_
/* Channel 0 is connected to an on board pot for testing
Channels 0-3 are available via expansion connector CON4
Channels 4-7 are routed to LCD connector for touchscreen operation if
supported by display panel.
*/
#define NUM_ADC_CHANNELS 8
#define ADC_ONBOARD 0
#define ADC_SPARE_1 1
#define ADC_SPARE_2 2
#define ADC_SPARE_3 3
#define ADC_TSYM 4
#define ADC_TSYP 5
#define ADC_TSXM 6
#define ADC_TSXP 7
#define ADC_READ_ERROR 0xFFFF
#endif

151
firmware/target/arm/s3c2440/mini2440/backlight-mini2440.c Normal file
View file

@ -0,0 +1,151 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "config.h"
#include "cpu.h"
#include "system.h"
#include "backlight-target.h"
#include "backlight.h"
#include "lcd.h"
#include "power.h"
/* Dummy value at index 0, 1-12 used. */
static const unsigned char log_brightness[13] =
{0,0,1,2,3,5,7,10,15,22,31,44,63};
static enum backlight_states
{
BACKLIGHT_CONTROL_IDLE,
BACKLIGHT_CONTROL_OFF,
BACKLIGHT_CONTROL_ON,
BACKLIGHT_CONTROL_SET,
BACKLIGHT_CONTROL_FADE
} backlight_control;
static unsigned char _backlight_brightness;
static unsigned char backlight_target;
/* Assumes that the backlight has been initialized */
void _backlight_set_brightness(int brightness)
{
/* stop the interrupt from messing us up */
backlight_control = BACKLIGHT_CONTROL_IDLE;
_backlight_brightness = log_brightness[brightness];
backlight_control = BACKLIGHT_CONTROL_SET;
}
void _backlight_set_state (unsigned int level)
{
if (level == 0)
GPGDAT &= ~GPIO_LCD_PWR;
else
GPGDAT |= GPIO_LCD_PWR;
}
/* led_control_service runs in interrupt context - be brief!
* This service is called once per interrupt timer tick - 100 times a second.
*
* There should be at most only one i2c operation per call - if more are need
* the calls should be spread across calls.
*
* Putting all led servicing in one thread means that we wont step on any
* i2c operations - they are all serialized here in the ISR tick. It also
* insures that we get called at equal timing for good visual effect.
*/
#ifndef BOOTLOADER
static void led_control_service(void)
{
switch (backlight_control)
{
case BACKLIGHT_CONTROL_IDLE:
backlight_control = BACKLIGHT_CONTROL_IDLE;
break;
case BACKLIGHT_CONTROL_OFF:
_backlight_set_brightness(0);
backlight_control = BACKLIGHT_CONTROL_IDLE;
break;
case BACKLIGHT_CONTROL_ON:
_backlight_set_brightness(255);
backlight_control = BACKLIGHT_CONTROL_IDLE;
break;
case BACKLIGHT_CONTROL_SET:
_backlight_set_brightness(255);
backlight_control = BACKLIGHT_CONTROL_IDLE;
break;
case BACKLIGHT_CONTROL_FADE:
_backlight_set_brightness(0);
backlight_control = BACKLIGHT_CONTROL_IDLE;
break;
default:
backlight_control = BACKLIGHT_CONTROL_IDLE;
break;
}
}
#endif /* BOOTLOADER */
static void __backlight_dim(bool dim_now)
{
/* dont let the interrupt tick happen */
backlight_control = BACKLIGHT_CONTROL_IDLE;
backlight_target = dim_now ? 0 : _backlight_brightness;
if(backlight_target==0 && _backlight_brightness==0)
{
if(dim_now == false)
backlight_control = BACKLIGHT_CONTROL_ON;
else
backlight_control = BACKLIGHT_CONTROL_OFF;
}
else
backlight_control = BACKLIGHT_CONTROL_FADE;
}
void _backlight_on(void)
{
#ifdef HAVE_LCD_ENABLE
lcd_enable(true); /* power on lcd + visible display */
#endif
__backlight_dim(false);
}
void _backlight_off(void)
{
__backlight_dim(true);
}
bool _backlight_init(void)
{
unsigned char brightness = log_brightness[DEFAULT_BRIGHTNESS_SETTING];
_backlight_brightness = brightness;
backlight_control = BACKLIGHT_CONTROL_ON;
_backlight_set_state (1);
S3C2440_GPIO_CONFIG (GPGCON, 4, GPIO_OUTPUT);
#ifndef BOOTLOADER
/* put the led control on the tick list */
tick_add_task(led_control_service);
#endif
return true;
}

31
firmware/target/arm/s3c2440/mini2440/backlight-target.h Normal file
View file

@ -0,0 +1,31 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2006 by Linus Nielsen Feltzing
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef BACKLIGHT_TARGET_H
#define BACKLIGHT_TARGET_H
#define GPIO_LCD_PWR (1 << 4) /* GPIO.G4 */
bool _backlight_init(void);
void _backlight_on(void);
void _backlight_off(void);
void _backlight_set_brightness(int brightness);
#endif

80
firmware/target/arm/s3c2440/mini2440/button-mini2440.c Normal file
View file

@ -0,0 +1,80 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "config.h"
#include "cpu.h"
#include "system.h"
#include "button.h"
#include "kernel.h"
void button_init_device(void)
{
/* Configure port directions and enable internal pullups on button inputs */
/* These are the standard 6 buttons on the Mini2440 */
S3C2440_GPIO_CONFIG (GPGCON, 0, GPIO_INPUT);
S3C2440_GPIO_CONFIG (GPGCON, 3, GPIO_INPUT);
S3C2440_GPIO_CONFIG (GPGCON, 5, GPIO_INPUT);
S3C2440_GPIO_CONFIG (GPGCON, 6, GPIO_INPUT);
S3C2440_GPIO_CONFIG (GPGCON, 7, GPIO_INPUT);
S3C2440_GPIO_CONFIG (GPGCON, 11, GPIO_INPUT);
S3C2440_GPIO_PULLUP (GPGUP, 0, GPIO_PULLUP_ENABLE);
S3C2440_GPIO_PULLUP (GPGUP, 3, GPIO_PULLUP_ENABLE);
S3C2440_GPIO_PULLUP (GPGUP, 5, GPIO_PULLUP_ENABLE);
S3C2440_GPIO_PULLUP (GPGUP, 6, GPIO_PULLUP_ENABLE);
S3C2440_GPIO_PULLUP (GPGUP, 7, GPIO_PULLUP_ENABLE);
S3C2440_GPIO_PULLUP (GPGUP, 11, GPIO_PULLUP_ENABLE);
/* These are additional buttons on my add on keypad */
S3C2440_GPIO_CONFIG (GPGCON, 9, GPIO_INPUT);
S3C2440_GPIO_CONFIG (GPGCON, 10, GPIO_INPUT);
S3C2440_GPIO_PULLUP (GPGUP, 9, GPIO_PULLUP_ENABLE);
S3C2440_GPIO_PULLUP (GPGUP, 10, GPIO_PULLUP_ENABLE);
}
inline bool button_hold(void)
{
return 0;
}
int button_read_device(void)
{
int btn = BUTTON_NONE;
/* Read the buttons - active low */
btn = (GPGDAT & BUTTON_MAIN) ^ BUTTON_MAIN;
return btn;
}
void touchpad_set_sensitivity(int level)
{
(void)level;
/* No touchpad */
}
bool headphones_inserted(void)
{
/* No detect */
return false;
}

70
firmware/target/arm/s3c2440/mini2440/button-target.h Normal file
View file

@ -0,0 +1,70 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef _BUTTON_TARGET_H_
#define _BUTTON_TARGET_H_
#include <stdbool.h>
#include "config.h"
bool button_hold(void);
void button_init_device(void);
int button_read_device(void);
void touchpad_set_sensitivity(int level);
/* Mini2440 specific button codes */
#define BUTTON_ONE 0x0001
#define BUTTON_TWO 0x0008
#define BUTTON_THREE 0x0020
#define BUTTON_FOUR 0x0040
#define BUTTON_FIVE 0x0080
#define BUTTON_SIX 0x0800
/* Add on buttons */
#define BUTTON_SEVEN 0x0200
#define BUTTON_EIGHT 0x0400
#define BUTTON_MENU BUTTON_ONE
#define BUTTON_UP BUTTON_TWO
#define BUTTON_SELECT BUTTON_THREE
#define BUTTON_DOWN BUTTON_FOUR
#define BUTTON_LEFT BUTTON_FIVE
#define BUTTON_RIGHT BUTTON_SIX
/* Add on buttons */
#define BUTTON_A BUTTON_SEVEN
#define BUTTON_POWER BUTTON_EIGHT
/* TODO: bodge to keep keymap-mini2440 happy */
#define BUTTON_VOL_DOWN 0x4000
#define BUTTON_VOL_UP 0x8000
#define BUTTON_MAIN (BUTTON_MENU|BUTTON_LEFT|BUTTON_RIGHT | \
BUTTON_UP |BUTTON_DOWN|BUTTON_SELECT | \
BUTTON_A |BUTTON_POWER )
#define BUTTON_REMOTE 0
#define POWEROFF_BUTTON BUTTON_MENU
#define POWEROFF_COUNT 10
#endif /* _BUTTON_TARGET_H_ */

43
firmware/target/arm/s3c2440/mini2440/lcd-target.h Normal file
View file

@ -0,0 +1,43 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins, Lyre Project
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
extern void lcd_enable(bool state);
/* Setup for Mini2440, 3.5" TFT LCD Touchscreen */
/* Config values for LCDCON1 */
#define LCD_CLKVAL 4
#define LCD_MMODE 0
#define LCD_PNRMODE 3
#define LCD_BPPMODE 12
#define LCD_ENVID 1
/* Config values for LCDCON2 */
#define LCD_UPPER_MARGIN 1
#define LCD_LOWER_MARGIN 4
#define LCD_VSYNC_LEN 1
/* Config values for LCDCON3 */
#define LCD_RIGHT_MARGIN 0
#define LCD_LEFT_MARGIN 25
/* Config values for LCDCON4 */
#define LCD_HSYNC_LEN 4

66
firmware/target/arm/s3c2440/mini2440/led-mini2440.c Normal file
View file

@ -0,0 +1,66 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "config.h"
#include "cpu.h"
#include "kernel.h"
/* LED functions for debug */
void led_init (void)
{
S3C2440_GPIO_CONFIG (GPBCON, 5, GPIO_OUTPUT);
S3C2440_GPIO_CONFIG (GPBCON, 6, GPIO_OUTPUT);
S3C2440_GPIO_CONFIG (GPBCON, 7, GPIO_OUTPUT);
S3C2440_GPIO_CONFIG (GPBCON, 8, GPIO_OUTPUT);
S3C2440_GPIO_PULLUP (GPBUP, 5, GPIO_PULLUP_DISABLE);
S3C2440_GPIO_PULLUP (GPBUP, 6, GPIO_PULLUP_DISABLE);
S3C2440_GPIO_PULLUP (GPBUP, 7, GPIO_PULLUP_DISABLE);
S3C2440_GPIO_PULLUP (GPBUP, 8, GPIO_PULLUP_DISABLE);
}
/* Turn on one or more LEDS */
void set_leds (int led_mask)
{
GPBDAT &= ~led_mask;
}
/* Turn off one or more LEDS */
void clear_leds (int led_mask)
{
GPBDAT |= led_mask;
}
/* Alternate flash pattern1 and pattern2 */
/* Never returns */
void led_flash (int led_pattern1, int led_pattern2)
{
while (1)
{
set_leds (led_pattern1);
sleep(HZ/2);
clear_leds (led_pattern1);
set_leds(led_pattern2);
sleep(HZ/2);
clear_leds (led_pattern2);
}
}

46
firmware/target/arm/s3c2440/mini2440/led-mini2440.h Normal file
View file

@ -0,0 +1,46 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef _LED_MINI2440_H_
#define _LED_MINI2440_H_
/* LED functions for debug etc */
#define LED1 0x0020 /* GPB5 */
#define LED2 0x0040 /* GPB6 */
#define LED3 0x0080 /* GPB7 */
#define LED4 0x0100 /* GPB8 */
#define LED_NONE 0x0000
#define LED_ALL (LED1|LED2|LED3|LED4)
void led_init (void);
/* Turn on one or more LEDS */
void set_leds (int led_mask);
/* Turn off one or more LEDS */
void clear_leds (int led_mask);
/* Alternate flash of pattern1 and pattern2 - never returns */
void led_flash (int led_pattern1, int led_pattern2);
#endif /* _LED_MINI2440_H_ */

55
firmware/target/arm/s3c2440/mini2440/power-mini2440.c Normal file
View file

@ -0,0 +1,55 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2009 by Bob Cousins
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "config.h"
#include "cpu.h"
#include <stdbool.h>
#include <stdio.h>
#include "kernel.h"
#include "system.h"
#include "power.h"
#include "led-mini2440.h"
void power_init(void)
{
/* Nothing to do */
}
unsigned int power_input_status(void)
{
unsigned int status = 0;
/* Always on*/
status = POWER_INPUT_MAIN;
return status;
}
/* Returns true if the unit is charging the batteries. */
bool charging_state(void)
{
return false;
}
void power_off(void)
{
/* we don't have any power control, user must do it */
led_flash (LED_NONE, LED_ALL);
while (1);
}

8
firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c → firmware/target/arm/s3c2440/system-s3c2440.c
View file

@ -165,6 +165,7 @@ void system_prepare_fw_start(void)
void system_init(void)
{
#ifdef GIGABEAT_F
INTMSK = 0xFFFFFFFF;
INTMOD = 0;
SRCPND = 0xFFFFFFFF;
@ -192,7 +193,7 @@ void system_init(void)
GPGUP |= 0x70;
GPHCON |= 0x4005;
GPHDAT |= 0x03;
GPHDAT |= 0x03;
/* TODO: do something with PRIORITY */
@ -208,6 +209,11 @@ void system_init(void)
CLKCON &= ~0xFF1ED0;
CLKSLOW |= 0x80;
#elif defined(MINI2440)
/* TODO: anything? */
#else
#error Unknown target
#endif
}
int system_memory_guard(int newmode)

114
firmware/target/arm/s3c2440/gigabeat-fx/system-target.h → firmware/target/arm/s3c2440/system-target.h
View file

@ -1,44 +1,70 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 by Greg White
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef SYSTEM_TARGET_H
#define SYSTEM_TARGET_H
#include "system-arm.h"
#include "mmu-arm.h"
#define CPUFREQ_DEFAULT 98784000
#define CPUFREQ_NORMAL 98784000
#define CPUFREQ_MAX 296352000
void system_prepare_fw_start(void);
void tick_stop(void);
/* Functions to set and clear regiser bits atomically */
/* Set and clear register bits */
void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
unsigned long mask);
/* Set register bits */
void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
/* Clear register bits */
void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
#endif /* SYSTEM_TARGET_H */
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 by Greg White
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef SYSTEM_TARGET_H
#define SYSTEM_TARGET_H
#include "system-arm.h"
#include "mmu-arm.h"
/* TODO: Needs checking/porting */
#ifdef GIGABEAT_F
#define CPUFREQ_DEFAULT 98784000
#define CPUFREQ_NORMAL 98784000
#define CPUFREQ_MAX 296352000
#ifdef BOOTLOADER
/* All addresses within rockbox are in IRAM in the bootloader so
are therefore uncached */
#define UNCACHED_ADDR(a) (a)
#else /* !BOOTLOADER */
#define UNCACHED_BASE_ADDR 0x30000000
#define UNCACHED_ADDR(a) ((typeof(a))((unsigned int)(a) | UNCACHED_BASE_ADDR ))
#endif /* BOOTLOADER */
#elif defined(MINI2440)
#define CPUFREQ_DEFAULT 101250000
#define CPUFREQ_NORMAL 101250000
#define CPUFREQ_MAX 405000000
#define UNCACHED_BASE_ADDR 0x30000000
#define UNCACHED_ADDR(a) ((typeof(a))((unsigned int)(a) | UNCACHED_BASE_ADDR ))
#else
#error Unknown target
#endif
void system_prepare_fw_start(void);
void tick_stop(void);
/* Functions to set and clear register bits atomically */
/* Set and clear register bits */
void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
unsigned long mask);
/* Set register bits */
void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
/* Clear register bits */
void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
#endif /* SYSTEM_TARGET_H */