From 3f71709152bbbc21c23f33c99ec74952fd1abebd Mon Sep 17 00:00:00 2001 From: Solomon Peachy Date: Sun, 7 Sep 2025 10:02:05 -0400 Subject: [PATCH] s5l77xx: Correct definitions of VICADDRESS(n) and AESINADDR By switching them from (const void* volatile*) to (void* volatile*) The 'const' bit was causing GCC>4 to optimize away writes to those addresses when compiled with -Os, badly breaking the interrupt handler. Change-Id: Ia4b0ca37e082bddf78e084b80a5e550894645f1a --- firmware/export/s5l87xx.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/firmware/export/s5l87xx.h b/firmware/export/s5l87xx.h index 65af9210b1..54c2fd9705 100644 --- a/firmware/export/s5l87xx.h +++ b/firmware/export/s5l87xx.h @@ -29,7 +29,6 @@ #define REG16_PTR_T volatile uint16_t * #define REG32_PTR_T volatile uint32_t * #define VOID_PTR_PTR_T void* volatile* -#define CONST_VOID_PTR_PTR_T const void* volatile* #if CONFIG_CPU==S5L8700 || CONFIG_CPU==S5L8701 #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ @@ -1596,7 +1595,7 @@ Information for them was gathered solely by reverse-engineering Apple's firmware #define AESAUXADDR (*((REG32_PTR_T)(AES_BASE + 0x30))) #elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720 #define AESOUTADDR (*((VOID_PTR_PTR_T)(AES_BASE + 0x20))) -#define AESINADDR (*((CONST_VOID_PTR_PTR_T)(AES_BASE + 0x28))) +#define AESINADDR (*((VOID_PTR_PTR_T)(AES_BASE + 0x28))) #define AESAUXADDR (*((VOID_PTR_PTR_T)(AES_BASE + 0x30))) #define AESKEY ((REG32_PTR_T)(AES_BASE + 0x4c)) #define AESIV ((REG32_PTR_T)(AES_BASE + 0x74)) @@ -1698,7 +1697,7 @@ Information for them was gathered solely by reverse-engineering Apple's firmware #define VICPRIORITYDAISY(v) (*((REG32_PTR_T)(VICBASE(v) + 0x28))) #define VICVECTADDR(v, i) (*((REG32_PTR_T)(VICBASE(v) + 0x100 + 4 * (i)))) #define VICVECTPRIORITY(v, i) (*((REG32_PTR_T)(VICBASE(v) + 0x200 + 4 * (i)))) -#define VICADDRESS(v) (*((CONST_VOID_PTR_PTR_T)(VICBASE(v) + 0xF00))) +#define VICADDRESS(v) (*((VOID_PTR_PTR_T)(VICBASE(v) + 0xF00))) #define VIC0IRQSTATUS VICIRQSTATUS(0) #define VIC0FIQSTATUS VICFIQSTATUS(0)