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New port: FiiO M3K on bare metal

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Change-Id: I7517e7d5459e129dcfc9465c6fbd708619888fbe
This commit is contained in:
Aidan MacDonald 2021-02-27 22:08:58 +00:00
parent 83fcbedc65
commit 3ec66893e3
143 changed files with 16585 additions and 24 deletions
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4
firmware/target/mips/mmu-mips.c
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@ -25,7 +25,7 @@
#include "system.h"
#include "mmu-mips.h"
#if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
#if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B || CONFIG_CPU == X1000
/* XBurst core has 32 JTLB entries */
#define NR_TLB_ENTRIES 32
#else
@ -134,7 +134,7 @@ void mmu_init(void)
/* Target specific operations:
* - invalidate BTB (Branch Table Buffer)
* - sync barrier after cache operations */
#if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
#if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B || CONFIG_CPU == X1000
#define INVALIDATE_BTB() \
do { \
register unsigned long tmp; \