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jz4760: Disable dynamic clocking entirely.

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Back off to 480MHz [max] clock, bus/mem clock of 120MHz.

576 is unstable on at least one unit, and 528 still glitches.

Change-Id: I020e48532524e739f3bfa42bed570381ccd34959
This commit is contained in:
Solomon Peachy 2020-08-29 10:54:45 -04:00
parent 3867f0b959
commit 3dc4f817de
2 changed files with 4 additions and 4 deletions
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6
firmware/export/config/xduoox3.h
View file

@ -160,13 +160,13 @@
#define CONFIG_CPU JZ4760B #define CONFIG_CPU JZ4760B
/* If we have adjustable frequency */ /* If we have adjustable frequency */
#define CPUFREQ_MAX 576000000 // datasheet sez 600MHz max. Must be multiple of 48! #define CPUFREQ_MAX 480000000 // datasheet sez 600MHz max. Must be multiple of 48!
#define CPUFREQ_MIN 192000000 #define CPUFREQ_MIN 192000000
#define CPUFREQ_NORMAL CPUFREQ_MIN #define CPUFREQ_NORMAL CPUFREQ_MIN
#ifndef BOOTLOADER #ifndef BOOTLOADER
#define HAVE_ADJUSTABLE_CPU_FREQ //#define HAVE_ADJUSTABLE_CPU_FREQ
#define HAVE_GUI_BOOST //#define HAVE_GUI_BOOST
#endif #endif
#ifdef HAVE_ADJUSTABLE_CPU_FREQ #ifdef HAVE_ADJUSTABLE_CPU_FREQ

2
firmware/target/mips/ingenic_jz47xx/system-jz4760.c
View file

@ -451,7 +451,7 @@ static void pll0_init(unsigned int freq)
* DIV should be one of [1, 2, 3, 4, 6, 8] * DIV should be one of [1, 2, 3, 4, 6, 8]
*/ */
const int div[2][6] = { { 1, 2, 2, 2, 2, 2 }, const int div[2][6] = { { 1, 2, 2, 2, 2, 2 },
{ 1, 6, 6, 6, 6, 6 } }; { 1, 4, 4, 4, 4, 4 } };
const int n2FR[9] = { const int n2FR[9] = {
0, 0, 1, 2, 3, 0, 4, 0, 5 0, 0, 1, 2, 3, 0, 4, 0, 5
}; };