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Hosted targets Fix timer cycle calculation overflow
at 1 GHZ the intermediate calculation for cycles overflows 32 bits this makes timer fail even with sensible values solution divide both sides by 100 Change-Id: I18a4054c2d06fb72531d5496bba562f71b03984f
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186dbb4527
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3a7a46d1c0
2 changed files with 5 additions and 2 deletions
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@ -424,7 +424,10 @@ static void init_event_thread(bool init, struct event_data *ev_data)
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IF_COP(, COP));
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/* Timer is used to poll waiting events */
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rb->timer_register(1, NULL, EV_TIMER_FREQ, rev_timer_isr IF_COP(, CPU));
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if (!rb->timer_register(1, NULL, EV_TIMER_FREQ, rev_timer_isr IF_COP(, CPU)))
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{
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rb->splash(100, "No timer available!");
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}
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}
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static void playback_event_callback(unsigned short id, void *data)
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@ -104,7 +104,7 @@ void tick_start(unsigned int interval_in_ms)
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}
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#define cycles_to_microseconds(cycles) \
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((int)((1000000*cycles)/TIMER_FREQ))
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((int)((10000*cycles)/(TIMER_FREQ / 100)))
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static timer_t timer_tid;
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