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Setup LCD ourselves; move LCD buffer and TTB to free up 1.7MB of memory

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11994 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Greg White 2007-01-13 02:24:15 +00:00
parent 35b0c3f24f
commit 355be5010a
12 changed files with 138 additions and 103 deletions
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6
apps/plugins/plugin.lds
View file

@ -37,6 +37,8 @@ OUTPUT_FORMAT(elf32-sh)
#define IRAMORIG 0x407000
#define IRAMSIZE 0x9000
#elif CONFIG_CPU == S3C2440
#include "s3c2440.h"
#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - STUBOFFSET - LCD_BUFFER_SIZE - TTB_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#define DRAMORIG 0x100 + STUBOFFSET
#define IRAMORIG DRAMORIG
#define IRAMSIZE 4K
@ -46,11 +48,13 @@ OUTPUT_FORMAT(elf32-sh)
#endif
#define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
#if CONFIG_CPU != S3C2440
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_LENGTH - CODEC_SIZE
#endif
#define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
#define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
#ifdef CODEC
#define THIS_LENGTH CODEC_SIZE
#define THIS_ORIGIN CODEC_ORIGIN

9
bootloader/gigabeat.c
View file

@ -323,6 +323,9 @@ void * main(void)
lcd_puts(0, line++, "Hold MENU when booting for rescue mode.");
lcd_puts(0, line++, " \"VOL+\" button to restore original kernel");
lcd_puts(0, line++, " \"A\" button to load original firmware");
line++;
snprintf(buf, sizeof(buf), "FRAME %x TTB %x", FRAME, TTB_BASE);
lcd_puts(0, line++, buf);
lcd_update();
sleep(1*HZ);
@ -334,7 +337,7 @@ void * main(void)
while(1);
}
sleep(5*HZ);
sleep(1*HZ);
if(GPGDAT & 0x10) {
load_original = true;
@ -434,7 +437,7 @@ load_rockbox:
map_memory();
lcd_puts(0, line, "Loading Rockbox...");
lcd_update();
sleep(HZ*4);
/* sleep(HZ*4); */
// TODO: read those values from somwhere
loadbuffer = (unsigned char*) 0x100;
@ -447,7 +450,7 @@ load_rockbox:
} else {
lcd_puts(0, line++, "Rockbox loaded.");
lcd_update();
kernel_entry = (void*)0x100;
kernel_entry = (void*) loadbuffer;
rc = kernel_entry();
snprintf(buf, sizeof(buf), "Woops, should not return from firmware: %d", rc);
lcd_puts(0, line++, buf);

7
firmware/app.lds
View file

@ -26,8 +26,9 @@ INPUT(target/sh/crt0.o)
#define STUBOFFSET 0
#endif
#if CONFIG_CPU!=S3C2440
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
#endif
#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300)
#define DRAMORIG 0x31000000 + STUBOFFSET
#define IRAMORIG 0x10000000
@ -45,7 +46,9 @@ INPUT(target/sh/crt0.o)
#define IRAMORIG 0x400000
#define IRAMSIZE 0x7000
#elif CONFIG_CPU==S3C2440
#define DRAMORIG 0x100 + STUBOFFSET
#include "s3c2440.h"
#define DRAMORIG (0x100 + STUBOFFSET)
#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - STUBOFFSET - LCD_BUFFER_SIZE - TTB_SIZE - PLUGINSIZE - CODECSIZE
#define IRAMORIG DRAMORIG
#define IRAMSIZE 4K
#define IRAM DRAM

2
firmware/export/lcd.h
View file

@ -347,8 +347,10 @@ extern void lcd_set_drawinfo(int mode, unsigned foreground,
void lcd_set_backdrop(fb_data* backdrop);
#if defined(TOSHIBA_GIGABEAT_F) && !defined(SIMULATOR)
void lcd_device_prepare_backdrop(fb_data* backdrop);
bool lcd_enabled(void);
#else
#define lcd_device_prepare_backdrop(x) ;
#define lcd_enabled() true
#endif
fb_data* lcd_get_backdrop(void);

9
firmware/export/s3c2440.h
View file

@ -143,9 +143,12 @@
#define LCDINTMSK (*(volatile int *)0x4D00005C) /* LCD interrupt mask */
#define TCONSEL (*(volatile int *)0x4D000060) /* TCON(LPC3600/LCC3600) control */
/* The following should be computed but for now, we cheat. */
#define FRAME ( (short *) 0x31E00000 ) /* LCD Frame buffer */
#define LCD_BUFFER_SIZE ((320*240*2))
#define TTB_SIZE (0x4000)
/*#define FRAME ( (short *) 0x31E00000 ) */ /* LCD Frame buffer - Firmware Address */
/* must be 16Kb (0x4000) aligned */
#define TTB_BASE (0x30000000 + (32*1024*1024) - TTB_SIZE) /* End of memory */
#define FRAME ((short *) (TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */
/* NAND Flash */
#define NFCONF (*(volatile int *)0x4E000000) /* NAND flash configuration */

9
firmware/target/arm/gigabeat/meg-fx/ata-meg-fx.c
View file

@ -53,6 +53,7 @@ void ata_device_init(void)
{
}
#if !defined(BOOTLOADER)
void copy_read_sectors(unsigned char* buf, int wordcount)
{
__buttonlight_trigger();
@ -94,7 +95,9 @@ void copy_read_sectors(unsigned char* buf, int wordcount)
DISRC0 = (int) 0x18000000;
DISRCC0 = 0x1;
/* Dest mapped to physical address, on AHB bus, increment */
DIDST0 = (int) (buf + 0x30000000);
DIDST0 = (int) buf;
if(DIDST0 < 0x30000000)
DIDST0 += 0x30000000;
DIDSTC0 = 0;
/* DACK/DREQ Sync to AHB, Int on Transfer complete, Whole service, No reload, 16-bit transfers */
@ -112,10 +115,10 @@ void copy_read_sectors(unsigned char* buf, int wordcount)
/* Wait for transfer to complete */
while((DSTAT0 & 0x000fffff))
CLKCON |= (1 << 2); /* set IDLE bit */
yield();
/* Dump cache for the buffer */
}
#endif
void dma0(void)
{
}

4
firmware/target/arm/gigabeat/meg-fx/backlight-meg-fx.c
View file

@ -123,8 +123,8 @@ bool __backlight_init(void)
buttonlight_selected = 0x04;
/* delay 2 seconds before any fading */
initial_tick_delay = 2000;
/* delay 4 seconds before any fading */
initial_tick_delay = 400;
/* put the led control on the tick list */
tick_add_task(led_control_service);

45
firmware/target/arm/gigabeat/meg-fx/lcd-meg-fx.c
View file

@ -29,21 +29,37 @@ bool lcd_enabled()
return lcd_on;
}
unsigned int LCDBANK(unsigned int address)
{
return ((address >> 22) & 0xff);
}
unsigned int LCDBASEU(unsigned int address)
{
return (address & ((1 << 22)-1)) >> 1;
}
unsigned int LCDBASEL(unsigned int address)
{
address += 320*240*2;
return (address & ((1 << 22)-1)) >> 1;
}
/* LCD init */
void lcd_init_device(void)
{
memset16(fg_pattern_blit, fg_pattern, sizeof(fg_pattern_blit)/2);
memset16(bg_pattern_blit, bg_pattern, sizeof(bg_pattern_blit)/2);
clean_dcache_range((void *)fg_pattern_blit, sizeof(fg_pattern_blit));
clean_dcache_range((void *)bg_pattern_blit, sizeof(bg_pattern_blit));
LCDSADDR1 = 0x18F00000; /* These values are pulled from an F40 */
LCDSADDR2 = 0x00112C00; /* They should move FRAME to the correct location */
LCDSADDR3 = 0x000000F0; /* TODO: Move FRAME to where we want it */
LCDSADDR1 = (LCDBANK((unsigned)FRAME) << 21) | (LCDBASEU((unsigned)FRAME));
LCDSADDR2 = LCDBASEL((unsigned)FRAME);
LCDSADDR3 = 0x000000F0;
LCDCON5 |= 1 << 11; /* Switch from 555I mode to 565 mode */
#if !defined(BOOTLOADER)
memset16(fg_pattern_blit, fg_pattern, sizeof(fg_pattern_blit)/2);
memset16(bg_pattern_blit, bg_pattern, sizeof(bg_pattern_blit)/2);
clean_dcache_range((void *)fg_pattern_blit, sizeof(fg_pattern_blit));
clean_dcache_range((void *)bg_pattern_blit, sizeof(bg_pattern_blit));
use_dma_blit = true;
lcd_poweroff = true;
#endif
@ -66,7 +82,7 @@ void lcd_update_rect(int x, int y, int width, int height)
{
/* Wait for this controller to stop pending transfer */
while((DSTAT1 & 0x000fffff))
CLKCON |= (1 << 2); /* set IDLE bit */
yield();
/* Flush DCache */
invalidate_dcache_range((void *)(((int) &lcd_framebuffer)+(y * sizeof(fb_data) * LCD_WIDTH)), (height * sizeof(fb_data) * LCD_WIDTH));
@ -92,7 +108,7 @@ void lcd_update_rect(int x, int y, int width, int height)
/* Wait for transfer to complete */
while((DSTAT1 & 0x000fffff))
CLKCON |= (1 << 2); /* set IDLE bit */
yield();
}
else
memcpy(((char*)FRAME) + (y * sizeof(fb_data) * LCD_WIDTH), ((char *)&lcd_framebuffer) + (y * sizeof(fb_data) * LCD_WIDTH), ((height * sizeof(fb_data) * LCD_WIDTH)));
@ -143,9 +159,8 @@ void lcd_clear_display_dma(void)
void *src;
bool inc = false;
if(!lcd_on) {
sleep(200);
}
if(!lcd_on)
yield();
if (lcd_get_drawmode() & DRMODE_INVERSEVID)
src = fg_pattern_blit;
else
@ -162,7 +177,7 @@ void lcd_clear_display_dma(void)
}
/* Wait for any pending transfer to complete */
while((DSTAT3 & 0x000fffff))
CLKCON |= (1 << 2); /* set IDLE bit */
yield();
DMASKTRIG3 |= 0x4; /* Stop controller */
DIDST3 = ((int) lcd_framebuffer) + 0x30000000; /* set DMA dest, physical address */
DIDSTC3 = 0; /* Dest on AHB, increment */
@ -182,7 +197,7 @@ void lcd_clear_display_dma(void)
/* Wait for transfer to complete */
while((DSTAT3 & 0x000fffff))
CLKCON |= (1 << 2); /* set IDLE bit */
yield();
}
void lcd_clear_display(void)

9
firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c
View file

@ -1,6 +1,7 @@
#include <string.h>
#include "s3c2440.h"
#include "mmu-meg-fx.h"
#include "panic.h"
void map_memory(void);
static void enable_mmu(void);
@ -20,7 +21,7 @@ void map_memory(void) {
enable_mmu();
}
unsigned int* ttb_base;
unsigned int* ttb_base = (unsigned int *) TTB_BASE;
const int ttb_size = 4096;
void set_ttb() {
@ -29,7 +30,7 @@ void set_ttb() {
int domain_access;
/* must be 16Kb (0x4000) aligned */
ttb_base = (int*)0x31F00000;
ttb_base = (int*) TTB_BASE;
for (i=0; i<ttb_size; i++,ttbPtr++)
ttbPtr = 0;
asm volatile("mcr p15, 0, %0, c2, c0, 0" : : "r" (ttb_base));
@ -47,8 +48,8 @@ void set_page_tables() {
map_section(0x30000000, 0, 32, CACHE_NONE); /* map RAM to 0 */
map_section(0x30000000, 0, 30, CACHE_ALL); /* cache the first 30 MB or RAM */
map_section(0x31E00000, 0x31E00000, 1, BUFFERED); /* enable buffered writing for the framebuffer */
map_section(0x30000000, 0, 32, CACHE_ALL); /* cache the first 31 MB or RAM */
map_section((int)FRAME, (int)FRAME, 1, BUFFERED); /* enable buffered writing for the framebuffer */
}
void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags) {

1
firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c
View file

@ -59,6 +59,7 @@ void system_init(void)
/* Turn off AC97 and Camera */
CLKCON &= ~( (1<<19) | (1<<20) );
}

2
tools/configure vendored
View file

@ -1031,7 +1031,7 @@ EOF
target_id=20
archos="gigabeatf"
target="-DGIGABEAT_F"
memory=30 # always
memory=32 # always
arm9tdmicc
tool="cp"
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"