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Fix or at least significantly improve FS#11830. With introduction of ATA DMA for PP502x a special treatment of the IDE0_CFG register for the iPod nano (see FS#7510) was lost.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29106 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Andree Buschmann 2011-01-21 23:32:57 +00:00
parent 01586b5ffe
commit 30b29f1866
1 changed files with 4 additions and 0 deletions
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4
firmware/target/arm/ata-pp5020.c
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@ -106,7 +106,9 @@ void ata_dma_set_mode(unsigned char mode) {
int modeidx; int modeidx;
(*(volatile unsigned long *)(0x600060C4)) = 0xC0000000; /* 80 Mhz */ (*(volatile unsigned long *)(0x600060C4)) = 0xC0000000; /* 80 Mhz */
#if !defined(IPOD_NANO)
IDE0_CFG &= ~0x10000000; IDE0_CFG &= ~0x10000000;
#endif
modeidx = mode & 7; modeidx = mode & 7;
mode &= 0xF8; mode &= 0xF8;
@ -121,7 +123,9 @@ void ata_dma_set_mode(unsigned char mode) {
} else if (mode == 0x20 && modeidx <= ATA_MAX_MWDMA) } else if (mode == 0x20 && modeidx <= ATA_MAX_MWDMA)
IDE0_PRI_TIMING1 = tm_mwdma[modeidx]; IDE0_PRI_TIMING1 = tm_mwdma[modeidx];
#if !defined(IPOD_NANO)
IDE0_CFG |= 0x20000000; /* >= 50 Mhz */ IDE0_CFG |= 0x20000000; /* >= 50 Mhz */
#endif
} }
#define IDE_CFG_INTRQ 8 #define IDE_CFG_INTRQ 8