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fuze+: add more clocking code, add dma code, add ssp code, add stub usb code, update storage to SD + MMC, beginning of the driver

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30010 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Amaury Pouly 2011-06-17 22:30:58 +00:00
parent d4800fa385
commit 2cf3313382
15 changed files with 1069 additions and 4 deletions
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16
firmware/target/arm/imx233/clkctrl-imx233.h
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@ -31,9 +31,20 @@
#define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26)
#define HW_CLKCTRL_PIX (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x60))
#define HW_CLKCTRL_SSP (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x70))
#define HW_CLKCTRL_CLKSEQ (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x110))
#define HW_CLKCTRL_CLKSEQ__BYPASS_PIX (1 << 1)
#define HW_CLKCTRL_CLKSEQ__BYPASS_SSP (1 << 5)
#define HW_CLKCTRL_FRAC (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0xf0))
#define HW_CLKCTRL_FRAC_CPU (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf0))
#define HW_CLKCTRL_FRAC_EMI (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf1))
#define HW_CLKCTRL_FRAC_PIX (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf2))
#define HW_CLKCTRL_FRAC_IO (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf3))
#define HW_CLKCTRL_FRAC_XX__XXDIV_BM 0x3f
#define HW_CLKCTRL_FRAC_XX__XX_STABLE (1 << 6)
#define HW_CLKCTRL_FRAC_XX__CLKGATEXX (1 << 7)
#define HW_CLKCTRL_RESET (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x120))
#define HW_CLKCTRL_RESET_CHIP 0x2
@ -42,11 +53,16 @@
enum imx233_clock_t
{
CLK_PIX,
CLK_SSP,
CLK_IO,
};
void imx233_enable_timrot_xtal_clk32k(bool enable);
/* only use it for non-fractional clocks (ie not for IO) */
void imx233_enable_clock(enum imx233_clock_t clk, bool enable);
void imx233_set_clock_divisor(enum imx233_clock_t clk, int div);
/* call with fracdiv=0 to disable it */
void imx233_set_fractional_divisor(enum imx233_clock_t clk, int fracdiv);
void imx233_set_bypass_pll(enum imx233_clock_t clk, bool bypass);
#endif /* CLKCTRL_IMX233_H */