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ipod6g: ceata_rw_multiple_block()'s COUNT is MMC blocks, not sectors

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Default MMC block size is 512B, and the DMA block size must equal
the MMC block size.  As we do not negotiate a larger block size,
scale the transfer count up to match the drive's logical sector size.

(CE-ATA mandates a *minimum* sector size of 4K)

Change-Id: I701cbac5c0fa320e8d38ea3333d99257b9b1f560
This commit is contained in:
Solomon Peachy 2025-11-20 19:51:20 -05:00
parent 25b985c319
commit 2c53f6122a
1 changed files with 7 additions and 5 deletions
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12
firmware/target/arm/s5l8702/ipod6g/storage_ata-6g.c
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@ -491,7 +491,8 @@ static int ceata_cancel_command(void)
return 0; return 0;
} }
static int ceata_rw_multiple_block(bool write, void* buf, uint16_t bsize, uint32_t count, long timeout) /* Note COUNT is in terms of MMC blocks, ie 512 bytes */
static int ceata_rw_multiple_block(bool write, void* buf, uint32_t count, long timeout)
{ {
mmc_discard_irq(); mmc_discard_irq();
uint32_t responsetype; uint32_t responsetype;
@ -509,7 +510,7 @@ static int ceata_rw_multiple_block(bool write, void* buf, uint16_t bsize, uint32
responsetype = SDCI_CMD_RES_TYPE_R1; responsetype = SDCI_CMD_RES_TYPE_R1;
direction = MMC_CMD_CEATA_RW_MULTIPLE_BLOCK_DIRECTION_READ; direction = MMC_CMD_CEATA_RW_MULTIPLE_BLOCK_DIRECTION_READ;
} }
SDCI_DMASIZE = bsize; SDCI_DMASIZE = 512; /* Default MMC block size is 512. Can be negotiated to 1K or 4K */
SDCI_DMAADDR = buf; SDCI_DMAADDR = buf;
SDCI_DMACOUNT = count; SDCI_DMACOUNT = count;
SDCI_DCTRL = SDCI_DCTRL_TXFIFORST | SDCI_DCTRL_RXFIFORST; SDCI_DCTRL = SDCI_DCTRL_TXFIFORST | SDCI_DCTRL_RXFIFORST;
@ -545,7 +546,7 @@ static int ata_identify(uint16_t* buf)
ceata_taskfile[0xf] = CMD_IDENTIFY; ceata_taskfile[0xf] = CMD_IDENTIFY;
PASS_RC(ceata_wait_idle(), 2, 0); PASS_RC(ceata_wait_idle(), 2, 0);
PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 2, 1); PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 2, 1);
PASS_RC(ceata_rw_multiple_block(false, buf, 512, 1, CEATA_COMMAND_TIMEOUT * HZ / 1000000), 2, 2); PASS_RC(ceata_rw_multiple_block(false, buf, 1, CEATA_COMMAND_TIMEOUT * HZ / 1000000), 2, 2);
} }
else else
{ {
@ -801,7 +802,8 @@ static int ata_rw_chunk_internal(uint64_t sector, uint32_t cnt, void* buffer, bo
ceata_taskfile[0xf] = write ? CMD_WRITE_DMA_EXT : CMD_READ_DMA_EXT; ceata_taskfile[0xf] = write ? CMD_WRITE_DMA_EXT : CMD_READ_DMA_EXT;
PASS_RC(ceata_wait_idle(), 2, 0); PASS_RC(ceata_wait_idle(), 2, 0);
PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 2, 1); PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 2, 1);
PASS_RC(ceata_rw_multiple_block(write, buffer, log_sector_size, cnt, CEATA_COMMAND_TIMEOUT * HZ / 1000000), 2, 2); cnt <<= (identify_info[106] - 9); /* convert LOGICAL block size into 512B CE-ATA blocks */
PASS_RC(ceata_rw_multiple_block(write, buffer, cnt << 3, CEATA_COMMAND_TIMEOUT * HZ / 1000000), 2, 2);
return 0; return 0;
} }
@ -1194,7 +1196,7 @@ static int ata_smart(uint16_t* buf, uint8_t cmd)
} }
ceata_taskfile[0x9] = cmd; ceata_taskfile[0x9] = cmd;
PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 3, 4); PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 3, 4);
PASS_RC(ceata_rw_multiple_block(false, buf, 512, 1, CEATA_COMMAND_TIMEOUT * HZ / 1000000), 3, 5); PASS_RC(ceata_rw_multiple_block(false, buf, 1, CEATA_COMMAND_TIMEOUT * HZ / 1000000), 3, 5);
} }
else else
{ {