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as3525v2-usb: define number of enpoints correctly, write interrupt handler
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27098 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Amaury Pouly
parent
58ad1e7c4b
commit
237d9666cc
3 changed files with 157 additions and 118 deletions
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@ -38,32 +38,38 @@
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static int __in_ep_list[NUM_IN_EP] = {IN_EP_LIST};
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static int __out_ep_list[NUM_OUT_EP] = {OUT_EP_LIST};
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static int __in_ep_list_ep0[NUM_IN_EP + 1] = {0, IN_EP_LIST};
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static int __out_ep_list_ep0[NUM_OUT_EP + 1] = {0, OUT_EP_LIST};
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/* iterate through each in/out ep except EP0
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* 'counter' is the counter, 'ep' is the actual value */
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#define FOR_EACH_IN_EP(counter, ep) \
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for(counter = 0, ep = __in_ep_list[0]; counter < NUM_IN_EP; counter++, ep = __in_ep_list[counter])
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#define FOR_EACH_IN_EP_AND_EP0(counter, ep) \
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for(counter = 0, ep = __in_ep_list_ep0[0]; counter <= NUM_IN_EP; counter++, ep = __in_ep_list_ep0[counter])
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#define FOR_EACH_OUT_EP(counter, ep) \
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for(counter = 0, ep = __out_ep_list[0]; counter < NUM_OUT_EP; counter++, ep = __out_ep_list[counter])
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#define FOR_EACH_OUT_EP_AND_EP0(counter, ep) \
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for(counter = 0, ep = __out_ep_list_ep0[0]; counter <= NUM_OUT_EP; counter++, ep = __out_ep_list_ep0[counter])
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struct usb_endpoint
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{
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void *buf;
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unsigned int len;
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union
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{
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unsigned int sent;
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unsigned int received;
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};
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bool wait;
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bool busy;
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bool done;
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int status;
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struct wakeup complete;
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};
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#if 0
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static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS*2];
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#endif
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static struct usb_ctrlrequest ep0_setup_pkt __attribute__((aligned(16)));
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/* NOTE: the following structure is not used to EP0
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* and make the assumption that each endpoint is
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* either IN or OUT but not bidirectional */
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static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS];
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static struct usb_ctrlrequest ep0_setup_pkt USB_DEVBSS_ATTR;
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void usb_attach(void)
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{
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@ -175,10 +181,9 @@ static void reset_endpoints(void)
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/* Setup EP0 OUT with the following parameters:
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* packet count = 1
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* setup packet count = 1
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* transfer size = 64
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* transfer size = 8 (setup packet)
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* Setup EP0 IN/OUT with 64 byte maximum packet size and activate both. Enable transfer on EP0 OUT
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*/
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DOEPTSIZ(0) = (1 << DEPTSIZ0_supcnt_bitp)
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| (1 << DEPTSIZ0_pkcnt_bitp)
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| 8;
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@ -305,10 +310,8 @@ static void core_dev_init(void)
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/* Setup interrupt masks for endpoints */
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/* Setup interrupt masks */
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DOEPMSK = DOEPINT_setup | DOEPINT_xfercompl | DOEPINT_ahberr
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| DOEPINT_epdisabled;
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DIEPMSK = DIEPINT_xfercompl | DIEPINT_timeout
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| DIEPINT_epdisabled | DIEPINT_ahberr;
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DOEPMSK = DOEPINT_setup | DOEPINT_xfercompl | DOEPINT_ahberr;
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DIEPMSK = DIEPINT_xfercompl | DIEPINT_timeout | DIEPINT_ahberr;
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DAINTMSK = 0xffffffff;
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reset_endpoints();
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@ -381,80 +384,95 @@ void usb_drv_exit(void)
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disable_global_interrupts();
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}
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static void dump_regs(void)
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static void handle_ep_int(int ep, bool dir_in)
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{
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logf("DSTS: %lx", DSTS);
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logf("DOEPCTL0=%lx", DOEPCTL(0));
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logf("DOEPTSIZ=%lx", DOEPTSIZ(0));
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logf("DIEPCTL0=%lx", DIEPCTL(0));
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logf("DOEPMSK=%lx", DOEPMSK);
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logf("DIEPMSK=%lx", DIEPMSK);
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logf("DAINTMSK=%lx", DAINTMSK);
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logf("DAINT=%lx", DAINT);
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logf("GINTSTS=%lx", GINTSTS);
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logf("GINTMSK=%lx", GINTMSK);
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logf("DCTL=%lx", DCTL);
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logf("GAHBCFG=%lx", GAHBCFG);
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logf("GUSBCFG=%lx", GUSBCFG);
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logf("DCFG=%lx", DCFG);
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logf("DTHRCTL=%lx", DTHRCTL);
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}
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static bool handle_reset(void)
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{
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logf("usb: bus reset");
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dump_regs();
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/* Clear the Remote Wakeup Signalling */
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DCTL &= ~DCTL_rmtwkupsig;
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/* Flush FIFOs */
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flush_tx_fifos(0x10);
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reset_endpoints();
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/* Reset Device Address */
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DCFG &= bitm(DCFG, devadr);
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usb_core_bus_reset();
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return true;
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}
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static bool handle_enum_done(void)
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{
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logf("usb: enum done");
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/* read speed */
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switch(extract(DSTS, enumspd))
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if(dir_in)
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{
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case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
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logf("usb: HS");
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break;
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case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
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case DSTS_ENUMSPD_FS_PHY_48MHZ:
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logf("usb: FS");
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break;
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case DSTS_ENUMSPD_LS_PHY_6MHZ:
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panicf("usb: LS is not supported");
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if(DIEPINT(ep) & DIEPINT_ahberr)
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panicf("usb: ahb error on EP%d IN", ep);
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if(DIEPINT(ep) & DIEPINT_xfercompl)
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{
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logf("usb: xfer complete on EP%d IN", ep);
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if(endpoints[ep].busy)
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{
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endpoints[ep].busy = false;
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endpoints[ep].status = 0;
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endpoints[ep].done = true;
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/* works even for PE0 */
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int transfered = endpoints[ep].len - (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
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clean_dcache_range((void *)DIEPDMA(ep), transfered);
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usb_core_transfer_complete(ep, USB_DIR_IN, 0, transfered);
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}
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}
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if(DIEPINT(ep) & DIEPINT_timeout)
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{
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logf("usb: timeout on EP%d IN", ep);
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if(endpoints[ep].busy)
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{
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endpoints[ep].busy = false;
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endpoints[ep].status = 1;
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endpoints[ep].done = true;
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/* for safety, act as if no bytes as been transfered */
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endpoints[ep].len = 0;
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usb_core_transfer_complete(ep, USB_DIR_IN, 1, 0);
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wakeup_signal(&endpoints[ep].complete);
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}
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}
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/* clear interrupts */
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DIEPINT(ep) = DIEPINT(ep);
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}
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else
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{
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if(DOEPINT(ep) & DOEPINT_ahberr)
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panicf("usb: ahb error on EP%d OUT", ep);
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if(DOEPINT(ep) & DOEPINT_xfercompl)
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{
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logf("usb: xfer complete on EP%d OUT", ep);
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if(endpoints[ep].busy)
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{
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endpoints[ep].busy = false;
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endpoints[ep].status = 0;
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endpoints[ep].done = true;
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/* works even for PE0 */
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int transfered = endpoints[ep].len - (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
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clean_dcache_range((void *)DOEPDMA(ep), transfered);
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usb_core_transfer_complete(ep, USB_DIR_OUT, 0, transfered);
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}
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}
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if(DOEPINT(ep) & DOEPINT_setup)
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{
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logf("usb: setup on EP%d OUT", ep);
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if(ep != 0)
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panicf("usb: setup not on EP0, this is impossible");
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clean_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt); /* force write back */
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usb_core_control_request(&ep0_setup_pkt);
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}
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/* setup EP0 for the next transfer */
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DOEPTSIZ(0) = (1 << DEPTSIZ0_supcnt_bitp) | (1 << DEPTSIZ0_pkcnt_bitp) | 8;
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DOEPDMA(0) = (unsigned long)&ep0_setup_pkt; /* virtual address=physical address */
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DOEPCTL(0) |= DEPCTL_epena | DEPCTL_cnak;
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/* clear interrupts */
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DOEPINT(ep) = DOEPINT(ep);
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}
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/* fixme: change EP0 mps here */
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dump_regs();
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return true;
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}
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static bool handle_in_ep_int(void)
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static void handle_ep_ints(void)
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{
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panicf("usb: in ep int");
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return false;
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}
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logf("usb: ep int");
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/* we must read it */
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unsigned long daint = DAINT;
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unsigned i, ep;
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static bool handle_out_ep_int(void)
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{
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panicf("usb: out ep int");
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return false;
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FOR_EACH_IN_EP_AND_EP0(i, ep)
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if(daint & DAINT_IN_EP(ep))
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handle_ep_int(ep, true);
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FOR_EACH_OUT_EP_AND_EP0(i, ep)
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if(daint & DAINT_OUT_EP(ep))
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handle_ep_int(ep, false);
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/* write back to clear status */
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DAINT = daint;
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}
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/* interrupt service routine */
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@ -463,45 +481,59 @@ void INT_USB(void)
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/* some bits in GINTSTS can be set even though we didn't enable the interrupt source
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* so AND it with the actual mask */
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unsigned long sts = GINTSTS & GINTMSK;
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unsigned long handled_one = 0; /* mask of all listed one (either handled or not) */
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#define HANDLED_CASE(bitmask, callfn) \
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handled_one |= bitmask; \
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if(sts & bitmask) \
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{ \
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if(!callfn()) \
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goto Lerr; \
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}
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#define UNHANDLED_CASE(bitmask) \
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handled_one |= bitmask; \
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if(sts & bitmask) \
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goto Lunhandled;
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/* device part */
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HANDLED_CASE(GINTMSK_usbreset, handle_reset)
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HANDLED_CASE(GINTMSK_enumdone, handle_enum_done)
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HANDLED_CASE(GINTMSK_inepintr, handle_in_ep_int)
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HANDLED_CASE(GINTMSK_outepintr, handle_out_ep_int)
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if(sts & GINTMSK_usbreset)
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{
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logf("usb: bus reset");
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/* Clear the Remote Wakeup Signalling */
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DCTL &= ~DCTL_rmtwkupsig;
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/* Flush FIFOs */
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flush_tx_fifos(0x10);
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reset_endpoints();
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/* Reset Device Address */
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DCFG &= bitm(DCFG, devadr);
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usb_core_bus_reset();
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}
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if(sts & GINTMSK_enumdone)
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{
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logf("usb: enum done");
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/* read speed */
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switch(extract(DSTS, enumspd))
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{
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case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
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logf("usb: HS");
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break;
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case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
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case DSTS_ENUMSPD_FS_PHY_48MHZ:
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logf("usb: FS");
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break;
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case DSTS_ENUMSPD_LS_PHY_6MHZ:
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panicf("usb: LS is not supported");
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}
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/* fixme: change EP0 mps here */
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}
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if(sts & (GINTMSK_outepintr | GINTMSK_inepintr))
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{
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handle_ep_ints();
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}
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/* common part */
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UNHANDLED_CASE(GINTMSK_otgintr)
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UNHANDLED_CASE(GINTMSK_conidstschng)
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UNHANDLED_CASE(GINTMSK_disconnect)
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/* unlisted ones */
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if(sts & ~handled_one)
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goto Lunhandled;
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if(sts & GINTMSK_otgintr)
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{
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panicf("usb: otg int");
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}
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GINTSTS = GINTSTS;
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return;
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Lunhandled:
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panicf("unhandled usb int: %lx", sts);
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Lerr:
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panicf("error in usb int: %lx", sts);
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}
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int usb_drv_port_speed(void)
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@ -421,7 +421,8 @@
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#define DOEPTSIZ(ep) DEV_REG(0x300 + (ep) * 0x20 + 0x10)
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/* valid for any D{I,O}EPTSIZi with 1<=i<=15, NOT for i=0 ! */
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#define DEPTSIZ_xfersize_bits 0x7ffff /** Transfer Size */
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#define DEPTSIZ_xfersize_bitp 0 /** Transfer Size */
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#define DEPTSIZ_xfersize_bits 0x7ffff
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#define DEPTSIZ_pkcnt_bitp 19 /** Packet Count */
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#define DEPTSIZ_pkcnt_bits 0x3ff
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#define DEPTSIZ_mc_bitp 29 /** Multi Count - Periodic IN endpoints */
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@ -452,7 +453,7 @@
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/**
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* Parameters
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*/
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#define USE_CUSTOM_FIFO_LAYOUT
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/*#define USE_CUSTOM_FIFO_LAYOUT*/
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#ifdef USE_CUSTOM_FIFO_LAYOUT
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/* Data fifo: includes RX fifo, non period TX fifo and periodic fifos
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