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https://github.com/Rockbox/rockbox.git
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x1000: LCD DMA fix
Credit ZappBranigan2972 on the forums Change-Id: Ia4d498d215d8f365156f15965b715832202bec8a
This commit is contained in:
Dana Conrad
Solomon Peachy
parent
d0aaa37d33
commit
1fb906500a
2 changed files with 115 additions and 41 deletions
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@ -69,11 +69,42 @@ static volatile int fbcopy_done;
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/* True if we're in sleep mode */
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static bool lcd_sleeping = false;
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#endif
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static bool lcd_on = false;
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/* Check if running with interrupts disabled (eg: panic screen) */
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#define lcd_panic_mode \
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UNLIKELY((read_c0_status() & 1) == 0)
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typedef enum {
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LCD_SEND0, LCD_SEND1,
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WAIT_FRAME, SLEEP_FRAME,
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WAIT_EOF, SLEEP_EOF,
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WAIT_QD,
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WAIT_FBCPF, WAIT_FBCPP
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} Lcd_ID;
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// TODO: This may need a yield?
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static void __attribute__ ((noinline)) lcd_wait(Lcd_ID id)
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{
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uint32_t i, done = 0;
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for(i=0; i<LCD_WAIT_STEPS; i++) {
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if (done) break;
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switch (id) {
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case LCD_SEND0:
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case LCD_SEND1:
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case WAIT_FRAME:
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case SLEEP_FRAME: done = !jz_readf(LCD_MSTATE, BUSY); break;
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case WAIT_EOF:
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case SLEEP_EOF: done = jz_readf(LCD_STATE, EOF) != 0; break;
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case WAIT_QD: done = jz_readf(LCD_STATE, QD) != 0; break;
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case WAIT_FBCPF:
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case WAIT_FBCPP: done = fbcopy_done != 0; break;
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}
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}
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}
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static void lcd_init_controller(const struct lcd_tgt_config* cfg)
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{
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/* Set MCFG/MCFG_NEW according to target interface settings */
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@ -125,7 +156,7 @@ static void lcd_init_controller(const struct lcd_tgt_config* cfg)
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/* DMA settings */
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jz_writef(LCD_CTRL, ENABLE(0), BURST_V(64WORD),
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EOFM(1), SOFM(0), IFUM(0), QDM(0),
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EOFM(0), SOFM(0), IFUM(0), QDM(0),
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BEDN(cfg->big_endian), PEDN(0));
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jz_write(LCD_DAH, LCD_WIDTH);
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jz_write(LCD_DAV, LCD_HEIGHT);
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@ -185,7 +216,7 @@ static void lcd_fbcopy_dma_cb(int evt)
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fbcopy_done = 1;
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}
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static void lcd_fbcopy_dma_run(dma_desc* d)
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static void lcd_fbcopy_dma_run(dma_desc* d, Lcd_ID id)
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{
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if(lcd_panic_mode) {
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/* Can't use DMA if interrupts are off, so just do a memcpy().
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@ -205,7 +236,7 @@ static void lcd_fbcopy_dma_run(dma_desc* d)
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jz_set(DMA_DB, 1 << DMA_CHANNEL_FBCOPY);
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jz_writef(DMA_CHN_CS(DMA_CHANNEL_FBCOPY), CTE(1));
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while(!fbcopy_done);
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lcd_wait(id);
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}
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static void lcd_fbcopy_dma_full(void)
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@ -221,7 +252,7 @@ static void lcd_fbcopy_dma_full(void)
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d.rt = jz_orf(DMA_CHN_RT, TYPE_V(AUTO));
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d.pad0 = 0;
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d.pad1 = 0;
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lcd_fbcopy_dma_run(&d);
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lcd_fbcopy_dma_run(&d, WAIT_FBCPF);
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}
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/* NOTE: DMA stride mode can only transfer up to 255 blocks at once.
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@ -254,7 +285,7 @@ static void lcd_fbcopy_dma_partial1(int x, int y, int width, int height)
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d.tc = width * height * sizeof(fb_data);
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}
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lcd_fbcopy_dma_run(&d);
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lcd_fbcopy_dma_run(&d, WAIT_FBCPP);
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}
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#if STRIDE_MAIN(LCD_HEIGHT, LCD_WIDTH) > 255
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@ -274,7 +305,12 @@ static void lcd_fbcopy_dma_partial(int x, int y, int width, int height)
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# define lcd_fbcopy_dma_partial lcd_fbcopy_dma_partial1
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#endif
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static void lcd_dma_start(void)
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typedef enum {
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MODE_INIT,
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MODE_SLEEP
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} DMA_Mode;
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static void lcd_dma_start(DMA_Mode mode)
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{
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/* Set format conversion bit, seems necessary for DMA mode.
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* Must set DTIMES here if we use an 8-bit bus type. */
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@ -286,44 +322,72 @@ static void lcd_dma_start(void)
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TE_INV(lcd_tgt_config.te_polarity ? 0 : 1),
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NOT_USE_TE(lcd_tgt_config.te_enable ? 0 : 1));
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/* ref PM sec. 4.9.1 DMA operation,
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* as well as sec. 4.5.2 Enabling the Controller.
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* I think we're effectively doing the last bit
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* of enabling the controller here, and then
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* doing dma start.
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*/
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jz_writef(LCD_MCTRL, DMA_MODE(1), DMA_START(1));
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while(jz_readf(LCD_MSTATE, BUSY));
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jz_writef(LCD_MCTRL, DMA_TX_EN(1));
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/* clear any old flags */
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jz_write(LCD_STATE, 0);
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/* Begin DMA transfer. Need to start a dummy frame or else we will
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* not be able to pass lcd_wait_frame() at the first lcd_update(). */
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jz_write(LCD_STATE, 0);
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// if (mode == MODE_INIT) { // Run this only once on Startup
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jz_write(LCD_DA, PHYSADDR(&lcd_dma_desc[0]));
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jz_writef(LCD_MCTRL, DMA_MODE(1), DMA_START(1), DMA_TX_EN(1));
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jz_writef(LCD_CTRL, ENABLE(1));
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// }
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lcd_on = true;
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}
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static bool lcd_wait_frame(void)
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{
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/* Bail out if DMA is not enabled */
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int irq = disable_irq_save();
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int bit = jz_readf(LCD_CTRL, ENABLE);
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restore_irq(irq);
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if(!bit)
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if(!lcd_active())
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return false;
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/* Usual case -- wait for EOF, wait for FIFO to drain, clear EOF */
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while(jz_readf(LCD_STATE, EOF) == 0);
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while(jz_readf(LCD_MSTATE, BUSY));
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lcd_wait(WAIT_EOF);
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lcd_wait(WAIT_FRAME);
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jz_writef(LCD_STATE, EOF(0));
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return true;
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}
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static void lcd_dma_stop(void)
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static void lcd_dma_stop(DMA_Mode mode)
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{
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int irq = disable_irq_save();
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lcd_on = false;
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restore_irq(irq);
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if (mode == MODE_INIT) { // Run this only once when endinng
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#ifdef LCD_X1000_DMA_WAIT_FOR_FRAME
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/* Wait for frame to finish to avoid misaligning the write pointer */
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lcd_wait_frame();
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#endif
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/* Stop the DMA transfer */
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jz_writef(LCD_CTRL, ENABLE(0));
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jz_writef(LCD_MCTRL, DMA_TX_EN(0));
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/* Wait for disable to take effect */
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while(jz_readf(LCD_STATE, QD) == 0);
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jz_writef(LCD_STATE, QD(0));
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lcd_wait(WAIT_QD);
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} else { // MODE_SLEEP
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jz_writef(LCD_CTRL, ENABLE(0));
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/* Usual case -- wait for EOF, wait for FIFO to drain */
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lcd_wait(SLEEP_EOF);
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lcd_wait(SLEEP_FRAME);
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/* Stop the DMA transfer */
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jz_writef(LCD_MCTRL, DMA_TX_EN(0));
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}
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jz_write(LCD_STATE, 0); // clear State
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/* Clear format conversion bit, disable vsync */
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jz_writef(LCD_MCFG_NEW, FMT_CONV(0), DTIMES(0));
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@ -332,7 +396,7 @@ static void lcd_dma_stop(void)
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static void lcd_send(uint32_t d)
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{
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while(jz_readf(LCD_MSTATE, BUSY));
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lcd_wait(LCD_SEND0);
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REG_LCD_MDATA = d;
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}
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@ -370,6 +434,7 @@ void lcd_exec_commands(const uint32_t* cmdseq)
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break;
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}
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}
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lcd_wait(LCD_SEND1);
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}
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void lcd_init_device(void)
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@ -381,7 +446,7 @@ void lcd_init_device(void)
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lcd_tgt_enable(true);
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lcd_dma_start();
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lcd_dma_start(MODE_INIT);
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}
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#ifdef HAVE_LCD_SHUTDOWN
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@ -389,8 +454,8 @@ void lcd_shutdown(void)
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{
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if(lcd_sleeping)
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lcd_tgt_sleep(false);
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else if(jz_readf(LCD_CTRL, ENABLE))
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lcd_dma_stop();
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else if(lcd_active())
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lcd_dma_stop(MODE_INIT);
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lcd_tgt_enable(false);
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jz_writef(CPM_CLKGR, LCD(1));
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@ -400,37 +465,42 @@ void lcd_shutdown(void)
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#if defined(HAVE_LCD_ENABLE) || defined(HAVE_LCD_SLEEP)
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bool lcd_active(void)
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{
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return jz_readf(LCD_CTRL, ENABLE);
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return lcd_on;
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}
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void lcd_enable(bool en)
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{
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/* Must disable IRQs to turn off the running LCD */
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int irq = disable_irq_save();
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int bit = jz_readf(LCD_CTRL, ENABLE);
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if(bit && !en)
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lcd_dma_stop();
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restore_irq(irq);
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bool state = lcd_active();
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if(state && !en)
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#if defined(BOOTLOADER)
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lcd_dma_stop(MODE_INIT);
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#else
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lcd_dma_stop(MODE_SLEEP);
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#endif
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/* Deal with sleep mode */
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#if defined(HAVE_LCD_SLEEP) || defined(LCD_X1000_FASTSLEEP)
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#if defined(LCD_X1000_FASTSLEEP)
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if(bit && !en) {
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if(state && !en) {
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lcd_tgt_sleep(true);
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lcd_sleeping = true;
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} else
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#endif
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if(!bit && en && lcd_sleeping) {
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if(!state && en && lcd_sleeping) {
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lcd_tgt_sleep(false);
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lcd_sleeping = false;
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}
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#endif
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/* Handle turning the LCD back on */
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if(!bit && en)
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if(!state && en)
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{
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send_event(LCD_EVENT_ACTIVATION, NULL);
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lcd_dma_start();
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#if defined(BOOTLOADER)
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lcd_dma_start(MODE_INIT);
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#else
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lcd_dma_start(MODE_SLEEP);
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#endif
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}
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}
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#endif
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@ -466,6 +536,9 @@ void lcd_update(void)
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* its entirety to the LCD through a different DMA process. */
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void lcd_update_rect(int x, int y, int width, int height)
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{
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if(!lcd_wait_frame())
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return;
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/* Clamp the coordinates */
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if(x < 0) {
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width += x;
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@ -486,9 +559,6 @@ void lcd_update_rect(int x, int y, int width, int height)
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if(width < 0 || height < 0)
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return;
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if(!lcd_wait_frame())
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return;
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commit_dcache();
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lcd_fbcopy_dma_partial(x, y, width, height);
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jz_writef(LCD_MCTRL, DMA_START(1), DMA_MODE(1));
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@ -77,6 +77,10 @@ struct lcd_tgt_config {
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size_t dma_wr_cmd_size;
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};
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#define LCD_WAIT_MAX_US 65500 /* µS max. Waittime */
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#define LCD_WAIT_US 1 /* µS per Step */
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#define LCD_WAIT_STEPS (LCD_WAIT_MAX_US / LCD_WAIT_US)
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/* Static configuration for the target's LCD, must be defined by target. */
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extern const struct lcd_tgt_config lcd_tgt_config;
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