rk27xx: rework linker scripts and crt0.S

Change-Id: Id1d509056026bc67e1a5051c60818336933d4aeb

firmware/target/arm/rk27xx/app.lds

@@ -37,42 +37,28 @@ SECTIONS
 
   .intvect : {
     _intvectstart = . ;
-    *(.intvect)
-    _intvectend = _newstart ;  
+    KEEP(*(.intvect))
+    _intvectend = . ;  
   } > IRAM AT > DRAM
-  _intvectcopy = LOADADDR(.intvect) ;
+  _intvectcopy = LOADADDR(.intvect);
 
   .text : {
     *(.init.text)
     *(.text*)
+    *(.icode*)
     *(.glue_7*)
   } > DRAM
 
-  .data : {
+  .rodata : {
     *(.rodata*)
-    *(.data*)
-    *(.ncdata*);
+    *(.irodata*)
     . = ALIGN(0x4);
   } > DRAM
 
-  .iram :
-  {
-      _iramstart = .;
-      *(.icode)
-      *(.irodata)
-      *(.idata)
-      . = ALIGN(0x4);
-      _iramend = .;
-  } > DRAM
-  _iramcopy = LOADADDR(.iram) ;
-
-  .ibss (NOLOAD) :
-  {
-      _iedata = .;
-      *(.qharray)
-      *(.ibss)
-      . = ALIGN(0x4);
-      _iend = .;
+  .data : {
+    *(.data*)
+    *(.idata*)
+    . = ALIGN(0x4);
   } > DRAM
 
   .stack (NOLOAD) :
@@ -95,7 +81,6 @@ SECTIONS
      _edata = .;
      *(.bss*);
      *(.ibss);
-     *(.ncbss*);
      *(COMMON);
     . = ALIGN(0x4);
      _end = .;

firmware/target/arm/rk27xx/boot.lds

@@ -9,8 +9,8 @@ OUTPUT_FORMAT(elf32-bigarm)
 OUTPUT_ARCH(arm)
 STARTUP(target/arm/rk27xx/crt0.o)
 
-#define DRAMORIG 0x60000000
-#define DRAMSIZE (MEMORYSIZE * 0x100000)
+#define DRAMORIG 0x60700000
+#define DRAMSIZE (MEMORYSIZE * 0x100000 - 0x700000)
 
 #define IRAMORIG 0x00000000
 #define IRAMSIZE 4K
@@ -23,35 +23,39 @@ MEMORY
 
 SECTIONS
 {
-  .intvect : {
-    _intvectstart = . ;
-    *(.intvect)
-    _intvectend = _newstart ;  
-  } > IRAM AT > DRAM
-  _intvectcopy = LOADADDR(.intvect) ;
+  .relocstart (NOLOAD) : {
+    _relocstart = .;
+  } > DRAM
 
   .text : {
     *(.init.text)
     *(.text*)
+    *(.icode*)
     *(.glue_7*)
   } > DRAM 
 
-  .data : {
+  .intvect : {
+    _intvectstart = . ;
+    KEEP(*(.intvect))
+    _intvectend = . ;  
+  } > IRAM AT > DRAM
+  _intvectcopy = LOADADDR(.intvect) ;
+
+  .rodata : {
     *(.rodata*)
-    *(.data*)
-    *(.ncdata*);
+    *(.irodata*)
     . = ALIGN(0x4);
   } > DRAM
 
-  .idata : {
-    _datastart = . ;
-    *(.irodata)
-    *(.icode)
-    *(.idata)
+  .data : {
+    *(.data*)
+    *(.idata*)
     . = ALIGN(0x4);
-    _dataend = . ;
-   } > DRAM
-   _datacopy = LOADADDR(.idata) ;
+  } > DRAM
+
+  .relocend (NOLOAD) : {
+    _relocend = .;
+  } > DRAM
 
   .stack (NOLOAD) :
   {
@@ -73,7 +77,6 @@ SECTIONS
      _edata = .;
      *(.bss*);
      *(.ibss);
-     *(.ncbss*);
      *(COMMON);
     . = ALIGN(0x4);
      _end = .;

firmware/target/arm/rk27xx/crt0.S

@@ -5,7 +5,6 @@
  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
  *                     \/            \/     \/    \/            \/
- * $Id: crt0.S 18776 2008-10-11 18:32:17Z gevaerts $
  *
  * Copyright (C) 2008 by Marcoen Hirschberg
  * Copyright (C) 2008 by Denes Balatoni
@@ -24,26 +23,50 @@
 #include "config.h"
 #include "cpu.h"
 
-    .section .intvect,"ax",%progbits
-    .global    start
-    .global    _newstart
-    /* Exception vectors */
-start:
-    b _newstart
-    ldr pc, =undef_instr_handler
-    ldr pc, =software_int_handler
-    ldr pc, =prefetch_abort_handler
-    ldr pc, =data_abort_handler
-    ldr pc, =reserved_handler
-    ldr pc, =irq_handler
-    ldr pc, =fiq_handler
-    .ltorg
-_newstart:
-    ldr pc, =newstart2
-    .section .init.text,"ax",%progbits
-newstart2:
-    msr     cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
+    .global start
+    .global entry_point
 
+    /* Exception vectors */
+    .section .intvect,"ax",%progbits
+    ldr     pc, =start
+    ldr     pc, =undef_instr_handler
+    ldr     pc, =software_int_handler
+    ldr     pc, =prefetch_abort_handler
+    ldr     pc, =data_abort_handler
+    ldr     pc, =reserved_handler
+    ldr     pc, =irq_handler
+    ldr     pc, =fiq_handler
+    .ltorg
+
+    .text
+start:
+    msr     cpsr_c, #0xd3      /* enter supervisor mode, disable IRQ/FIQ */
+
+#ifdef BOOTLOADER
+    sub     r4, pc, #12         /* copy running address, accomodate
+                                 * for prefetch (-8) and msr instr (-4)
+                                 */
+
+    ldr     r0, =0xefff0000    /* cache controler base address */
+    ldrh    r1, [r0]
+    strh    r1, [r0]           /* global cache disable */
+
+    ldr     r2, =_relocstart
+    ldr     r3, =_relocend
+
+    cmp     r2, r4
+    beq     entry_point        /* skip copying if we are in place already */
+1:
+    cmp     r3, r2
+    ldrhi   r1, [r4], #4
+    strhi   r1, [r2], #4
+    bhi     1b
+
+entry_point_jmp:
+    ldr     pc, =entry_point
+#endif
+
+entry_point:
     mov     r0, #0x18000000
     add     r0, r0, #0x1c000
 
@@ -135,26 +158,14 @@ newstart2:
     strhi   r4, [r2], #4
     bhi     1b
 
-#ifndef BOOTLOADER
-    /* Copy icode and data to ram */
-    ldr     r2, =_iramstart
-    ldr     r3, =_iramend
-    ldr     r4, =_iramcopy
-1:
-    cmp     r3, r2
-    ldrhi   r1, [r4], #4
-    strhi   r1, [r2], #4
-    bhi     1b
-    
-    /* Initialise ibss section to zero */
-    ldr     r2, =_iedata
-    ldr     r3, =_iend
+    /* Initialise bss, ibss section to zero */
+    ldr     r2, =_edata
+    ldr     r3, =_end
     mov     r4, #0
 1:
     cmp     r3, r2
     strhi   r4, [r2], #4
     bhi     1b
-#endif
 
     /* Set up stack for IRQ mode */ 
     msr     cpsr_c, #0xd2
@@ -184,12 +195,8 @@ newstart2:
     strhi   r3, [r2], #4
     bhi     1b
 
-
     bl      main
 
-    .text
-/*    .global UIE*/
-
 /* All illegal exceptions call into UIE with exception address as first
  * parameter. This is calculated differently depending on which exception
  * we're in. Second parameter is exception number, used for a string lookup