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imx233: make sure dma descriptors are cache friendly
Because DMA descriptors needs to be committed and discarded from the cache, if they are not cache aligned and/or if their size is not a multiple of cache ligne, nasty side effects could occur with adjacents data. The same applies to DMA buffers which are still potentially broken. Add a macro to ensure that these constraints will not break by error in the future. Change-Id: I1dd69a5a9c29796c156d953eaa57c0d281e79846
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5 changed files with 34 additions and 7 deletions
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@ -118,6 +118,10 @@
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* COMMON *
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**********/
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/* DMA structures should be cache aligned and be padded so that their size
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* is a multiple of a cache line size. Otherwise some nasty side effects
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* could occur with adjacents data fields.
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* The same apply to DMA buffers for the same reasons */
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struct apb_dma_command_t
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{
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struct apb_dma_command_t *next;
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