len0rd/rockbox
1
0
Fork 1
mirror of https://github.com/Rockbox/rockbox.git synced 2025-12-08 12:45:26 -05:00
Code Issues Projects Releases Packages Wiki Activity Actions

atj213x: fix desc file errors

Browse source 
Catched by swiss_knife check there are some overlaping fields
and invalid characters in some names.

Change-Id: Ia26ffd2e29452f4ddd9f8229f78bb2a2cc325ab4
This commit is contained in:
Marcin Bukat 2015-01-22 13:33:35 +01:00
parent 716fea805f
commit 15d4be5e9f
1 changed files with 6 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

12
utils/regtools/desc/regs-atj213x.xml
View file

@ -42,7 +42,7 @@
<addr name="FIFOCTL" addr="0x2c"/>
</reg>
<reg name="FIFOCFG" desc="">
<addr name="FIFOCTL" addr="0x30"/>
<addr name="FIFOCFG" addr="0x30"/>
</reg>
<reg name="ADDRDEC" desc="">
<addr name="ADDRDEC" addr="0x34"/>
@ -102,7 +102,7 @@
<field name="SIRE" desc="SIRQ Wakeup Enable" bitrange="29:29"/>
<field name="RESERVED28" desc="" bitrange="28:28"/>
<field name="USBE" desc="Usb Wakeup Enable" bitrange="27:27"/>
<field name="RESERVED26:12" desc="" bitrange="26:12"/>
<field name="RESERVED26_12" desc="" bitrange="26:12"/>
<field name="PCLKDIV" desc="Peripheral CLK Divisor" bitrange="11:8"/>
<field name="CORECLKS" desc="CPU Clock Selection" bitrange="7:6"/>
<field name="SCLKDIV" desc="System Clock Divisor" bitrange="5:4"/>
@ -463,7 +463,7 @@
<field name="IRQE" desc="IRQ Enable" bitrange="5:5"/>
<field name="MS" desc="Mode select" bitrange="4:4">
<value name="MASTER" value="0x0" desc=""/>
<value name="SLAVE" value="0x0" desc=""/>
<value name="SLAVE" value="0x1" desc=""/>
</field>
<field name="GBCC" desc="Generating Bus Control Condition (only for master mode)" bitrange="3:2">
<value name="NOP" value="0x0" desc=""/>
@ -980,7 +980,7 @@
</reg>
<reg name="FIFOCTRL" desc="">
<addr name="FIFOCTRL" addr="0x1a8"/>
<field name="DMA" desc="" bitrange="31:0"/>
<field name="DMA" desc="" bitrange="5:5"/>
<field name="CPU_ACCESS" desc="" bitrange="7:7"/>
<field name="DIR" desc="" bitrange="4:4">
<value name="OUT" value="0x0" desc=""/>
@ -1007,8 +1007,8 @@
<addr name="HCOUT2MAXPCKL" addr="0x3e4"/>
</reg>
<reg name="STADDR" desc="Endpoint buffer start address">
<addr name="OUT1STADDR " addr="0x304"/>
<addr name="IN2STADDR " addr="0x348"/>
<addr name="OUT1STADDR" addr="0x304"/>
<addr name="IN2STADDR" addr="0x348"/>
</reg>
<reg name="USBEIRQ" desc="USB extended irq register">
<addr name="USBEIRQ" addr="0x400"/>